Growing community of inventors

San Jose, CA, United States of America

Ashish Alawani

Average Co-Inventor Count = 3.91

ph-index = 2

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 19

Ashish AlawaniLi Sun (3 patents)Ashish AlawaniNitesh Kumbhat (2 patents)Ashish AlawaniMarshall Maple (2 patents)Ashish AlawaniTarak A Railkar (1 patent)Ashish AlawaniWei-Shun Wang (1 patent)Ashish AlawaniRay Myron Parkhurst (1 patent)Ashish AlawaniDeog Soon Choi (1 patent)Ashish AlawaniChris Chung (1 patent)Ashish AlawaniJin Jeong (1 patent)Ashish AlawaniDomingo Figueredo (1 patent)Ashish AlawaniSarah Kay Haney (1 patent)Ashish AlawaniDeog-Soon Choi (1 patent)Ashish AlawaniLea-Teng Lee (1 patent)Ashish AlawaniHusnu Masaracioglu (1 patent)Ashish AlawaniAshish Alawani (6 patents)Li SunLi Sun (10 patents)Nitesh KumbhatNitesh Kumbhat (6 patents)Marshall MapleMarshall Maple (5 patents)Tarak A RailkarTarak A Railkar (30 patents)Wei-Shun WangWei-Shun Wang (25 patents)Ray Myron ParkhurstRay Myron Parkhurst (21 patents)Deog Soon ChoiDeog Soon Choi (12 patents)Chris ChungChris Chung (11 patents)Jin JeongJin Jeong (7 patents)Domingo FigueredoDomingo Figueredo (7 patents)Sarah Kay HaneySarah Kay Haney (7 patents)Deog-Soon ChoiDeog-Soon Choi (6 patents)Lea-Teng LeeLea-Teng Lee (3 patents)Husnu MasaraciogluHusnu Masaracioglu (1 patent)
..
Inventor’s number of patents
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Strength of working relationships

Company Filing History:

1. Avago Technologies General IP (singapore) Pte. Ltd. (4 from 1,813 patents)

2. Avago Technologies International Sales Pte. Limited (2 from 896 patents)


6 patents:

1. 10141268 - Circuit package with internal and external shielding

2. 10134682 - Circuit package with segmented external shield to provide internal shielding between electronic components

3. 10021790 - Module with internal wire fence shielding

4. 9997428 - Via structures for thermal dissipation

5. 9865479 - Method of attaching components to printed cirucuit board with reduced accumulated tolerances

6. 8946904 - Substrate vias for heat removal from semiconductor die

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as of
12/7/2025
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