Hughes Network Systems, LLC

Ashish A Varhale

Yogesh Sethi

Gaurav Bhatia

Daniel Christopher Hantz

Yingquan Cheng

Karan Kakkar

Daniel C Hantz

Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.

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Germantown, MD, United States of America

Ashish A Varhale