Micron Technology Incorporated

Meta Platforms, Inc.

Ashay Narsale

Robert Michael Walker

Arvind Srinivasan

A system for facilitating RDMA transmit flow scheduling and pacing is disclosed. The system may determine a set of groups. The groups may be associated with a range of transmission rates. The system may determine a transmission rate of a queue pair. The system may assign the QP to a first group of the set of groups. The transmission rate of the QP may be within the range of transmission rates of the first group. The system may determine an available QP of at least one group from the set of groups. The system may schedule transmission, by an arbiter, of the available QP. The system may transmit, by the arbiter, a message associated with the available QP.

RDMA transmit flow scheduling and pacing scheme for congestion management in high-performance AI/ML networks

Various embodiments described herein provide for using a prefetch buffer with a cache of a memory sub-system to store prefetched data (e.g., data prefetched from the cache), which can increase read access or sequential read access of the memory sub-system over that of traditional memory sub-systems.

Prefetch buffer of memory sub-system

Exemplary methods, apparatuses, and systems include identifying that a first cache line from a first cache is subject to an operation that copies data from the first cache to a non-volatile memory. A first portion of the first cache line stores clean data and a second portion of the first cache line stores dirty data. A redundant copy of the dirty data is stored in a second cache line of the first cache. In response to identifying that the first cache line is subject to the operation, metadata associated with the redundant copy of the dirty data is used to copy the dirty data to a non-volatile memory while omitting the clean data.

Sector-based tracking for a page cache

Various embodiments described herein provide for using a prefetch buffer for a data interface bridge, which can be used with a memory sub-system to increase read access or sequential read access of data from a memory device coupled to the data interface bridge.

Prefetch for data interface bridge

A first request to perform an operation at an address associated with a media is obtained. The operation is issued to a plurality of cache divisions, wherein each cache division comprises a cache controller and a cache memory. A location in another memory associated with the first request is updated, the location in the other memory including a plurality of indicators corresponding to a status of the operation with each of the plurality of cache divisions. Based on one or more responses from the cache division(s), a response to the first request is sent.

Cache in a non-volatile memory subsystem

A method to cache memory requests while accounting for phase change memory cell drift is described. The method includes adding, in response to receiving a write memory request from a host system, an entry to a cache that includes user data of the write memory request, wherein the write memory request is directed to a set of phase change memory cells; adding, in response to receiving the write memory request, an entry in a first content-addressable memory (CAM), wherein the entry in the first CAM includes a reference to the entry in the cache that includes the user data of the write memory request; writing the user data of the write memory request to the set of phase change memory cells; and adding an entry to a second CAM, wherein the entry in the second CAM includes a reference to the entry in the cache that includes the user data.

Media manager cache with integrated drift buffer

A method for caching memory requests while accounting for a phase change memory cell drift phenomenon is described. The method includes writing first user data to an address in phase change memory cells; setting a timer in a set of data structures to a first value in response to writing the first user data to the phase change memory cells, wherein the data structures are stored outside the phase change memory cells; determining whether the timer corresponding to the first user data has expired; and fulfilling a read request for the address from the set of data structures in response to determining that the timer has not expired.

Growing community of inventors

Newark, CA, United States of America

Ashay Narsale