International Business Machines Corporation

Asaf Regev

Ofer Geva

Christopher J Berry

Timothy A Schell

Yaniv Maroz

Rina Kipnis

Amit Amos Atias

Vadim Liberchuk

Ido Geldman

A method for distributing deep trench (DT) capacitance in an integrated circuit (IC) design is provided. The method includes forming a placement block that includes blockages defining openings in interstitial regions among the blockages, superimposing the placement block over the IC design and providing distributed DT capacitance to the IC design. The providing of the distributed DT capacitance includes adding DT capacitance cells through the openings to portions of the IC design where there are no reserved blocks.

Deep trench capacitor distribution

In some examples, a system for modifying circuit can include a processor to detect a previous routed top level circuit design that was proven to close timing within a predetermined range and congestion below a threshold level. The processor can also detect a new pin to be added to a new circuit design and detect user input indicating a bounding box corresponding to a new macro boundary in the previous routed top level circuit design. Additionally, the processor can identify a location of a net in the previous circuit design corresponding to the new pin, wherein the new pin is placed at an intersection between the net and the bounding box. Furthermore, the processor can manufacture a circuit based on the previous circuit design and the placement of the new pin at the intersection between the net and the bounding box.

Modifying a circuit design based on pre-routed top level design

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Ramat Gan, Israel

Asaf Regev