Jasper Design Automation, Inc.

Asa Ben-Tzur

Ziyad Hanna

Tools for ranking of generated properties are described. A plurality of circuit design properties are generated from a signal trace of the circuit design. A static analysis of the circuit design properties is performed against one or more circuit design constraints to determine whether the properties are true. Rankings for the circuit design properties are determined responsive to results of the static analysis. The ranking for a circuit design property represents a value of the circuit design property in validating correct functionality of the circuit design. At least some of the circuit design properties are presented in a user interface responsive to the rankings for the circuit design properties.

Functional property ranking

A property generation tool that automatically generates a property for a circuit design from a signal trace of the circuit design. The property generation tool receives a trace of a circuit design. The trace includes signal values for a number of signals of the circuit design over a number of clock cycles. Signal signatures are generated from one or more characteristics of the signal values. Sets of candidate signals are identified from the circuit design signals based on the signal signatures. One or more properties of the circuit design are generated based on the signal values associated with the sets of candidate signals. The property can be output, for example, for display to a user of the property generation tool. Examples of properties that are generated by the property generation tool include handshaking properties and fairness properties.

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Shekhanya, Israel

Asa Ben-Tzur