Omnivision Technologies, Inc.

Varian Semiconductor Equipment Associates, Inc.

Arvind Kumar

Duli Mao

Gang Chen

Dyson Hsinchih Tai

Chih-Wei Hsiung

Yuanwei Zheng

John J Hautala

Simon Ruffell

Tristan Yonghui Ma

Steven Robert Sherman

Kyu-Ha Shim

Dominic Massetti

Hung Chih Chang

Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.

Non-uniform gate oxide thickness for DRAM device

An image sensor includes a plurality of photodiodes arranged in an array and disposed in a semiconductor material with pinning wells disposed between individual photodiodes in the plurality of photodiodes. The image sensor also includes a microlens layer. The microlens layer is disposed proximate to the semiconductor material and is optically aligned with the plurality of photodiodes. A spacer layer disposed between the semiconductor material and the microlens layer. The spacer layer has a concave cross-sectional profile across the array, and the microlens layer is conformal with the concave cross-sectional profile of the spacer layer.

Curved image sensor

A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry on the front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

Image sensor with enhanced quantum efficiency

A back side illuminated image sensor includes a semiconductor material having a front side and a back side. The semiconductor material is disposed between image sensor circuitry and a light filter array. The image sensor circuitry is disposed on the front side, and the light filter array is disposed proximate to the back side. The image sensor includes a first pixel with a first doped region that extends from the image sensor circuitry into the semiconductor material a first depth. The first pixel also includes a second doped region that is disposed between the back side of the semiconductor material and the first doped region. The second doped region is electrically isolated from the first doped region. A second pixel with a third doped region is also included in the image sensor. The third doped region extends from the image sensor circuitry into the semiconductor material a second depth.

Blue enhanced image sensor

An image sensor including a plurality of photodiodes disposed in a semiconductor layer and a plurality of deep trench isolation regions disposed in the semiconductor layer. The plurality of deep trench isolation regions include: (1) an oxide layer disposed on an inner surface of the plurality of deep trench isolation regions and (2) a conductive fill disposed in the plurality of deep trench isolation regions where the oxide layer is disposed between the semiconductor layer and the conductive fill. A plurality of pinning wells is also disposed in the semiconductor layer, and the plurality of pinning wells in combination with the plurality of deep trench isolation regions separate individual photodiodes in the plurality of photodiodes. A fixed charge layer is disposed on the semiconductor layer, and the plurality of deep trench isolation regions are disposed between the plurality of pinning wells and the fixed charge layer.

Conductive trench isolation

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Fremont, CA, United States of America

Arvind Kumar