Cisco Technology, Inc.

Arvind Kansal

Keith Frank Tharp

Clark Carty

William Frank Edwards

Amrik Singh Bains

Samir Bouadjel

Alan Yee

Ken Naumann

Mark A Ross

Sachidanandan Sambandan

Amrik Bains

Adjustable data rate data communications may be provided. First, a plurality of remote data rates at which a remote device is configured to operate may be received. Then, a plurality of local data rates at which a local device is configured to operate may be received. A greatest one of the plurality of local data rates may comprise a cable data rate comprising a greatest rate supported by a length of cable connecting the local device and the remote device. Next, an operating data rate may be determined. The operating data rate may comprise a highest one of the plurality of local data rates that has a corresponding equivalent within the plurality of remote data rates. The local device may then be operated at the operating data rate.

Adjustable data rates

Power Over Ethernet (POE)/universal power over Ethernet (UPoE) may be enabled at multigigabit port-channel connections. This may allow for additional speed support in auto-negotiation messages while employing multigigabit speeds. An integrated connector module (referred to herein as a 'ICM') compatible with UPoE with a modified local physical layer (PHY) circuit may be capable of supporting multi-gigabit data rates (such as between 1 G to 10 G, e.g., 2.5 G and 5 G) as to not limit the data rates to 1 G. The ICM may provide multi-gig data transmission through a first plurality of pins comprising a multi-gig data pin area. Furthermore, the ICM may provide UPoE power to support the multi-gig transmission through a second plurality of pins comprising a UPoE power pin area.

ICM foot-print with UPOE support

Content-addressable memory (CAM) architectures and methods of use are disclosed for enabling multiple concurrent lookups within a CAM array. One implementation arranges CAM arrays into multiple banks and enables parallel lookups of multiple key strings in multiple CAM banks. For a given input key, simultaneous parallel lookups in a plurality of CAM banks are performed by each bank using a bank key consisting of a subset of the bits of the input key. The multiple bank CAM is instructed to extract one or more distinct subsets of input key bits for use as bank lookup keys. Each bank key is passed to the appropriate bank according to the instruction received. Multiple bank sizes, depending on the key width and overall size of the CAM array, are also possible. Each bank produces a single output result, and each bank is returned to the host device that initially issued the lookup instruction.

Multiple bank CAM architecture and method for performing concurrent lookup operations

Growing community of inventors

Cupertino, CA, United States of America

Arvind Kansal