Lsi Logic Corporation

Thin Film Electronics Asa

Kovio, Inc.

Ensurge Micropower Asa

Lsi Corporation

Arvind Kamath

Patrick Smith

James Montague Cleeves

Aditi Chandra

Joerg Rockenberger

Erik C Scher

Venkatesh P Gopinath

Criswell Choi

Mohammad R Mirabedini

Steven E Molesa

Rajiv L Patel

Vivek Subramanian

Jiang Li

Wenzhuo Guo

Fabio Zürcher

Mao Takashima

Ming-Yi Lee

Vikram Pavate

Mao Ito

Fabio R Zurcher

Kevin Iliff McCarthy

Ruggero Castagnetti

Ravindra Manohar Kapre

J Devin MacKenzie

Michael K Kocsis

Somnath Mukherjee

Gloria Wong

Wen-Chin Stanley Yeh

Ikuo Mori

Shoba Rao

Venkatesh P Gopinth

Jonathon Y Simmons

Alex Yan

Richard Van Der Linde

Charles E May

Klaus Kunze

Vladimir K Dioumaev

Wai Lo

Junfeng Mei

Li Li

Dmitry Karshtedt

Inna Tregub

Scott R Bruner

Brian Bedwell

David Chan

Anand Deshpande

Paul Butler

Sambhu Kundu

Brian A Baylis

Miki Trifunovic

Zhongchun Wang

Ken Rafftesaeth

David Pachura

Gloria Man Ting Wong

Jun Li

Anton Popiolek

Joey Li

Khanh Van Tu

Kevin Mccarthy

Gloria Man Wong

A solid-state battery and a method of making the same are disclosed. The battery includes a base frame or support, first and second exterior contacts on the base frame/support, stacked solid-state battery unit cells, first and second electrical connections, and encapsulation in contact with the base frame/support and covering the solid-state battery unit cells and the electrical connections. Each stacked solid-state battery unit cell is on a metal substrate and has exposed cathode and anode current collectors. The electrical connections respectively electrically connect the exposed cathode and anode current collectors to the first and second exterior contacts. The method includes forming the stacked solid-state battery unit cells on the base frame/support, forming the exterior contacts on the base frame/support, electrically connecting the exposed cathode and anode current collectors to the respective exterior contacts, and encapsulating the solid-state battery unit cells and the electrical connections.

Stacked solid state batteries and methods of making the same

A multilayer solid-state electrolyte, solid-state battery cells including the same, and methods of making the electrolyte and the battery cells are disclosed. The multi-layer solid-state electrolyte includes a solid bulk electrolyte layer comprising carbon-doped lithium phosphorus oxynitride (LiPON) or WO(where 0≤x≤1), and a solid anode interface layer comprising LiPON or a metal oxide that forms a stable complex oxide with lithium oxide and conducts lithium ions when lithiated. The anode interface layer has a thickness less than that of the bulk electrolyte layer. The method of making the multi-layer solid-state electrolyte includes depositing one of the solid bulk electrolyte layer and the solid anode interface layer on an active layer of a battery cell, then depositing the other layer on the one layer. As for the solid-state electrolyte, the anode interface layer has a thickness less than that of the bulk electrolyte layer.

Multilayer solid-state electrolyte, battery cells including the same, and methods of making the same

The present disclosure pertains to a battery and a method of making the same. The battery includes first and second metal substrates, a first solid-state and/or thin-film battery cell on the first metal substrate, a second solid-state and/or thin-film battery cell on the second metal substrate, and a hermetic seal in a peripheral region of the first and second metal substrates. The first and second battery cells are between the first and second metal substrates, and face each other. The method includes respectively forming first and second solid-state and/or thin-film battery cells on first and second metal substrates, placing the second battery cell on the first battery cell so that the first and second battery cells are between the first and second metal substrates, and hermetically sealing the first and second battery cells in a peripheral region of the first and second metal substrates.

Solid-state battery and method of making the same

A wireless communication device having an integrated antenna, and methods for making and using the same are disclosed. The device generally includes (a) a substrate; (b) an integrated circuit (IC) comprising a plurality of printed and/or thin film layers and/or structures on the substrate, (c) a dielectric or insulator layer in at least one area of the substrate other than the IC; and (d) an antenna on the dielectric or insulator layer, comprising one or more metal traces. The plurality of printed and/or thin film layers and/or structures include an uppermost layer of metal. The antenna has (i) an inner terminal continuous with the uppermost layer of metal or connected to the uppermost layer of metal through one or more contacts, and (ii) an outer terminal connected to the uppermost layer of metal through one or more contacts and optionally a metal bridge or strap.

Printed and/or thin film integrated circuit with integrated antenna, and methods of making and using the same

High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition. The method generally comprises the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. Embodiments provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.

High precision capacitors

A wireless communication device and methods of manufacturing and using the same are disclosed. The wireless communication device includes a substrate with an antenna and/or inductor thereon, a patterned ferrite layer overlapping the antenna and/or inductor, and a capacitor electrically connected to the antenna and/or inductor. The wireless communication device may further include an integrated circuit including a receiver configured to convert a first wireless signal to an electric signal and a transmitter configured to generate a second wireless signal, the antenna being configured to receive the first wireless signal and transmit or broadcast the second wireless signal. The patterned ferrite layer advantageously mitigates the deleterious effect of metal objects in proximity to a reader and/or transponder magnetically coupled to the antenna.

Wireless communication device with integrated ferrite shield and antenna, and methods of manufacturing the same

Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.

Method for modifying and controlling the threshold voltage of thin film transistors

Methods for forming electrically precise capacitors on insulative substrates, and structures formed therefrom

Printable dopant formulations, methods of making such dopant formulations, and methods of using such dopant formulations are disclosed. The dopant formulations provide a printable dopant ink with a viscosity sufficient to prevent ink spreading when deposited in a pattern on a substrate. Furthermore, an ion exchange purification process provides the dopant formulation with a reduced metal ion concentration, and thus a relatively high purity level. Consequently, the dopant residue remaining on the substrate after curing and/or dopant activation process is relatively uniform, and therefore can be easily removed.

Dopant inks, methods of making dopant inks, and methods of using dopant inks

Semiconductor devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The semiconductor devices include a metal substrate, a diffusion barrier layer on the metal substrate, an insulator layer on the diffusion barrier layer, and a semiconductor layer on the insulator layer. The method includes forming a diffusion barrier layer on the metal substrate, forming an insulator layer on the diffusion barrier layer; and forming a semiconductor layer on the insulator layer. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into a semiconductor device formed thereon.

Diffusion barrier coated substrates and methods of making the same

A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

Printed dopant layers

Devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The devices include a metal substrate, a diffusion barrier layer on the metal substrate, one or more insulator layers on the diffusion barrier layer, and an antenna and/or inductor on the one or more insulator layer(s). The method includes forming a diffusion barrier layer on the metal substrate, forming one or more insulator layers on the diffusion barrier layer; and forming an antenna and/or inductor on an uppermost one of the insulator layer(s). The antenna and/or inductor is electrically connected to at least one of the diffusion barrier layer and/or the metal substrate. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into device layers formed thereon.

Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices.

Methods for manufacturing RFID tags and structures formed therefrom

Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.

Print processing for patterned conductor, semiconductor and dielectric materials

High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition are disclosed. The method generally includes the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. The methods provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.

Methods for forming electrically precise capacitors, and structures formed therefrom

Growing community of inventors

Mountain View, CA, United States of America

Arvind Kamath