Honeywell International Inc.

Arvind Easwaran

Srivatsan Varadarajan

Larry James Miller

Devesh Bhatt

David V Oglesby

Gabor Madl

Systems and methods for instruction entity allocation and scheduling on multi-processors is provided. In at least one embodiment, a method for generating an execution schedule for a plurality of instruction entities for execution on a plurality of processing units comprises arranging the plurality of instruction entities into a sorted order and allocating instruction entities in the plurality of instruction entities to individual processing units in the plurality of processing units. The method further comprises scheduling instances of the instruction entities in scheduled time windows in the execution schedule, wherein the instances of the instruction entities are scheduled in scheduled time windows according to the sorted order of the plurality of instruction entities and organizing the execution schedule into execution groups.

Systems and methods generating inter-group and intra-group execution schedules for instruction entity allocation and scheduling on multi-processors

Embodiments of the present invention provide improved systems and methods for grouping instruction entities. In one embodiment, a system comprises a processing cluster to execute software, the processing cluster comprising a plurality of processing units, wherein the processing cluster is configured to execute the software as a plurality of instruction entities. The processing cluster is further configured to execute the plurality of instruction entities in a plurality of execution groups, each execution group comprising one or more instruction entities, wherein the processing cluster executes a group of instruction entities in the one or more instruction entities in an execution group concurrently. Further, the execution groups are configured so that a plurality of schedule-before relationships are established, each schedule-before relationship being established among a respective set of instruction entities by executing the plurality of instruction entities in the plurality of execution groups.

Systems and methods for task grouping on multi-processors

A system for verifying that a comparison model having folded expressions matches a reference model includes at least one memory device that stores a reference model and a comparison model, wherein the comparison model was previously generated based on the reference model. The reference model adheres to a first set of syntax and semantics, wherein the reference model includes a plurality of first expressions, each of the first expressions including a first operator and a first operand. The comparison model adheres to a second set of syntax and semantics, wherein the comparison model includes a second expression, the second expression including a second operator and a second operand. The system further includes a processing unit configured to match the second expression with the plurality of first expressions.

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Minneapolis, MN, United States of America

Arvind Easwaran