Intel Corporation

Arunthathi Chandrabose

Shailendra Singh Chauhan

Mythili Hegde

Santhosh Ap

Tod F Schiff

Naoki Matsumura

Ramon C Cancel Olmo

Samantha Rao

Shashi Kant Singh

Jeffrey Schline

An apparatus comprises a circuit board comprising a connector in or on the circuit board. The apparatus is to be coupled to a bus via the connector. The apparatus comprises first circuitry to communicate with a processor via the connector and bus, second circuitry to detect a utilization state of the first circuitry, determine, based on the detected utilization state of the first circuitry, a level of current to be conducted with the connector; and generate a signal indicating of whether the level of current exceeds a threshold current capacity of the connector, and third circuitry to select a first operational mode from among multiple operational modes. The first circuitry is to operate in any of the multiple operational modes responsive to the third circuitry. Additional circuitry may be provided to identify a voltage level capability of the apparatus and to configure voltage level shifting circuitry connected to the bus.

Control of power use of a device powered by a communication bus and determining sideband signaling voltage level

A wireless device includes a voltage regulator circuit configured to generate a voltage signal of a first input voltage, and a wireless baseband processing circuitry (WBPC) coupled to the voltage regulator circuit to receive the voltage signal. The WBPC is configured to process signals for transmission or reception using wireless technology. The WBPC includes a sub-system processor circuit configured to detect a wireless bandwidth of an application executing on an application processor of the wireless device; determine a second input voltage based on the wireless bandwidth of the application and a maximum voltage supported by the WBPC; and encode a feedback signal for communication to the voltage regulator circuit. The feedback signal causes adjustment of the voltage signal to the second input voltage.

Application-based power control for a wireless device

A workload dependent load-sharing mechanism in a multi-battery system. The mechanism is an energy management system that operates in three modes—energy saving mode, balancer mode, and turbo mode. The energy saving mode is a normal mode where the multiple batteries provide power to their own set of loads with least resistive dissipation. In balancing mode, the batteries are connected through switches operating in active mode so that the current shared is inversely proportion to the corresponding battery state-of-charge. In turbo mode, both batteries are connected in parallel through switches (e.g., on-switches) to provide maximum power to a processor or load. A controller optimizes the sequence and charging rate for a hybrid battery to maximize both the charging current and charging speed of the battery, while enabling longer battery life. The hybrid battery comprises a fast charging battery and a high-energy density battery.

Multi load and multi battery system with sharing apparatuses

A battery-powered device includes a baseband modem, configured to receive or send data according to a first operational mode, wherein the data correspond to a software application being executed on the battery-powered device; and a processor, configured to determine a resource requirement of the software application; and send a signal representing the determined resource requirement to the baseband modem; wherein the baseband modem is further configured to change from the first operational mode to a second operational mode based on the signal.

Power management in battery powered communication device and method

An interface card includes a circuit board, a device mounted on the circuit board, and a PMIC mounted on the circuit board. The PMIC includes a PMIC processor communicatively coupled to a host processor of a host system. The PMIC processor is configured to receive an input voltage signal from a power supply that is external to the interface card. The PMIC processor generates at least one output voltage signal based on the input voltage signal. The at least one output voltage signal is supplied to the device. A power enable signal originating from the host processor is detected. The power enable signal is detected at a GPIO connector of the PMIC. The PMIC processor deactivates generation of the at least one output voltage signal based on the power enable signal.

Growing community of inventors

Bengaluru, India

Arunthathi Chandrabose