Lsi Corporation

Avago Technologies General IP (Singapore) Pte. Ltd.

Arunkumar Ragendran

Mahmoud K Jibbe

Senthil Kannan

Britto Rossario

Dhishankar Sengupta

Padmanabhan Pandurangan

An apparatus comprising an array controller and a frame buffer. The array controller may be configured to read/write data to/from a drive array in response to one or more input/output requests. The frame buffer may be implemented within the array controller and may be configured to perform (i) a first data integrity check to determine a first type of data error and (ii) a second data integrity check to determine a second type of data error. The frame buffer may log occurrences of the first type of error and the second type of error in a field transmitted with the data. The field may be used to determine a source of possible corruption of the data.

System and method to flag a source of data corruption in a storage subsystem using persistent source identifier bits

A method for establishing a secure connection between a first computer and a second computer, comprising the steps of (A) generating a signature authentication pair on the first computer, (B) receiving a plurality of authentication pairs that may or may not include the signature authentication pair, (C) detecting whether the signature authentication pair is received in the authentication pairs and (D) if the signature authentication pair is detected, creating a secure connection between the first computer and the second computer.

System and method to establish and/or manage a trusted relationship between a host to storage array controller and/or a storage array to storage array controller

An apparatus comprising a controller and an array. The controller may be configured to generate control signals in response to one or more input requests. The array may comprise a plurality of solid state devices. The solid state devices may be configured to (i) read and/or write data in response to the control signals received from the controller and (ii) distribute writes across the plurality of solid state devices such that each of said solid state devices has a similar number of writes.

System and method to efficiently schedule and/or commit write data to flash based SSDs attached to an array controller

An apparatus comprising an interface circuit and a controller. The interface circuit may be configured to calculate a speed signal in response to data traffic measured over a network. The controller may be configured to present and receive data from an array in response to (a) the speed signal and (b) one or more input/output requests. The interface circuit may generate the speed signal in response to a plurality of predetermined factors. The controller may present and receive the data at one of a plurality of speeds in response to the speed signal.

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Bengaluru, India

Arunkumar Ragendran