Intel Corporation

Aruni P Nelson

Abdul Rahman Ismail

Devon Worrell

Udaya S Natarajan

Adeel A Aslam

Kannappan Rajaraman

Binu John

Ashok Mishra

Bikrant Das Sharma

A USB4 host system for offloading compute processing includes a host processor and a first routing circuit communicatively coupled to the host processor via an interface adapter. The first routing circuit is to decode device capability information received via a USB Type-C communication link from a second routing circuit. The device capability information indicates the second routing circuit is configured for offload processing. A downstream tunneled path is configured between the host processor and the second routing circuit based on the device capability information. The downstream tunneled path includes the USB Type-C communication link. One or more acceleration commands and operands/data from the host processor are packetized into a first plurality of USB4 tunneled packets. The first plurality of USB4 tunneled packets is encoded for transmission to the second routing circuit via the downstream tunneled path, to initiate the offload processing of the operands/data by the second routing circuit.

Offloading compute processing to an input/output (I/O) device connected over a USB type-C connector

Embodiments provide apparatuses, systems, and methods related to an electronic device that includes first one or more ports to transmit data from the electronic device, and one or more buffers to buffer the data prior to transmission of the data on the ports. The electronic device may further includes a bandwidth management module to: identify a bandwidth required to transmit an amount of the data on the first one or more ports; identify bandwidth-related parameters of the first one or more ports; and identify, based on the bandwidth-related parameters and the bandwidth required to transmit the amount of the data, buffer allocation of the data. The electronic device may further include a buffer management module coupled with the bandwidth management module, the buffer management module to allocate the data to the one or more buffers based on the buffer allocation. Other embodiments may be described and claimed.

Power-conscious input/output (I/O) buffer allocation

In an embodiment, a host system for selecting a power supply includes a processor, a bus interface to connect to a peripheral device, and a power controller. The power controller may be to: determine whether the processor has entered a reduced power mode; determine, via one or more bus messages, whether charging is to be performed for a battery of the peripheral device; and in response to a determination that the processor has entered the reduced power mode and that charging is not to be performed for the battery of the peripheral device, switch from a first power supply to a second power supply as an active power source of the host system. Other embodiments are described and claimed.

Selection of power supply for a host system

Example apparatus disclosed herein compare one or more audio latency characteristics with one or more audio latency requirements in response to detection of an audio silence event, the audio latency characteristic(s) associated with at least one of a hardware layer or a device layer of an audio stack of a compute device, the audio latency requirement(s) associated with an application. Disclosed example apparatus also control a device layer of the audio stack to enter a device layer low power mode in response to a first determination that the audio latency requirement(s) is/are met by the audio latency characteristic(s). Disclosed example apparatus further control a hardware layer of the audio stack to enter a hardware layer low power mode in response to the first determination and a second determination that an operation condition for entry into the hardware layer low power mode is met.

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Folsom, CA, United States of America

Aruni P Nelson