International Business Machines Corporation

Hitachi Global Storage Technologies Netherlands B.v.

Globalfoundries Inc.

Hitachi Global Technologies Netherlands B.v.

Arun Sharma

Sri Muthuthamby Sri-Jayantha

Hien Phu Dang

Vijayeshwar Das Khanna

Muthuthamby Sri-Jayantha

Isao Yoneda

Kiyoshi Satoh

Evangelos Stavros Eleftheriou

Mark Alfred Lantz

Charalampos Pozidis

David L Questad

Lorenzo Valdevit

Naoyuki Kagami

Jennifer V Muncy

Gerard McVicker

Tetsuo Ueda

Akira Tokizono

Nobuyuki Kitazaki

Satoshi Yamamoto

Timothy Joseph Chainer

Mark Delorman Schultz

Gareth Geoffrey Hougham

Hal Hjalmar Ottesen

Pritish Ranjan Parida

Lawrence Shungwei Mok

Sung Kwon Kang

Kenji Okada

Hideki Ohzeki

Yuzo Nakagawa

Tatsuo Nakamoto

Kiochi Takeuchi

Nayouki Kagami

Jennifer V Muney

S M Sri-Jayantha

Michael S Gordon

Gordon James Smith

Kenneth Parker Rodbell

Christopher Vincent Jahnes

Eric Andrew Joseph

Hiroyuki Miyazoe

Hideo Asano

Michael Anthony Moser

Suresh Kumar

Tatsuya Sakai

Michael Charles Stich

Mirei Hosono

Koichi Arai

Masayuki Takeuchi

Tatsuya Endoh

Vijaveshwar Das Khanna

Hirouki Suzuki

Akira Shinjoh

Jagdeep Tahliani

Koji Kawabata

Vijayeshwar D Kharma

An organic substrate and method of making with optimal thermal warp characteristics is disclosed. The organic substrate has one or more top layers and one or more bottom layers. A chip footprint region is a surface region on each of the top and bottom layers that is defined as the projection of one or more semiconductor chips (chips) on the surface of each of the top and bottom layers. One or more top removal patterns are located on and may or may not remove material from the surface of one or more of the top layers within the chip footprint region of the respective top layer. One or more bottom removal patterns are located on and remove material from the surface of one or more of the bottom layers outside the chip footprint region of the respective bottom layer. The removal of the material from one or more of the top layers and/or bottom layers changes and optimizes a thermal warp of the organic substrate. In some embodiments, a Shape Inversion Temperature (SIT) of the substrate is made equal to or above a reflow temperature.

Optimum warp in organic substrates

An electronic module includes a substrate including at least one structure that reduces stress flow through the substrate, wherein the structure includes at least one trench in a surface of the substrate, and a plurality of capacitor legs disposed on an upper surface of the substrate.

Electronic components on trenched substrates and method of forming same

A method aspect for removing heat from a data center may use liquid coolant cooled without vapor compression refrigeration on a liquid cooled information technology equipment rack. The method may also include regulating liquid coolant flow to the data center through a range of liquid coolant flow values with a controller-apparatus based upon information technology equipment temperature threshold of the data center.

Data center cooling method

A method for a constructing radiation detector includes fabricating a multi-layer structure upon a wafer, the multi-layer structure comprising a plurality of metal layers, a plurality of sacrificial layers, and a plurality of insulating layers, forming a cavity within the multi-layer structure, filling the cavity with a gas that ionizes in response to nuclear radiation, and sealing the gas within the cavity.

Fabricating a small-scale radiation detector

A data center cooling system may include heat transfer equipment to cool a liquid coolant without vapor compression refrigeration, and the liquid coolant is used on a liquid cooled information technology equipment rack housed in the data center. The system may also include a controller-apparatus to regulate the liquid coolant flow to the liquid cooled information technology equipment rack through a range of liquid coolant flow values based upon information technology equipment temperature thresholds.

Data center cooling system

An electronic module including a substrate having at least one structure that reduces stress flow through the substrate, wherein the structure comprises at least one trench in a surface of the substrate.

A method for characterizing thermomechanical properties of an organic substrate is provided. The method includes the steps of: receiving an image of the organic substrate, the image including a geometric description of the plurality of circuit layers of the substrate; selecting a given one of the plurality of circuit layers for processing; converting the image to a two-dimensional finite element model (FEM) image of the given one of the circuit layers; determining at least one of a coefficient of thermal expansion (CTE), modulus and Poisson's ratio of the FEM image of the given one of the circuit layers; repeating the steps of selecting a given one of the plurality of circuit layers, converting the image to a two-dimensional FEM image, and determining at least one of a CTE, modulus and Poisson's ratio of the FEM image for all of the plurality of circuit layers corresponding to at least a portion of the organic substrate; and constructing a three-dimensional representation of at least a portion of the organic substrate including the plurality of circuit layers as a function of at least one of the CTE, modulus and Poisson's ratio of each of the plurality of circuit layers.

Characterizing thermomechanical properties of an organic substrate using finite element analysis

A method judging a temperature of a chip including using a limited set of temperature sensors and using a knowledge of a power dissipation, estimating a temperature on a surface of a chip and predicting a future temperature of the chip knowing the instruction stream characteristics to be processed by the chip.

Method and system for real-time estimation and prediction of the thermal state of a microprocessor unit

A method of characterizing an organic substrate including a plurality of circuit layers is provided includes the steps of: receiving an image of the organic substrate, the image including a geometric description of the circuit layers of the substrate; segmenting the substrate into multiple processing regions based, at least in part, on geometric coordinates of circuit structures defined in the image of the substrate; generating a circuit layer image corresponding to a selected one of the processing regions of the substrate; identifying one or more geometric features in the circuit layer image; estimating at least one thermomechanical property of the circuit layer image as a function of the identified geometric features; repeating the steps of receiving an image, generating a circuit layer image, identifying one or more geometric features in the circuit layer image, and estimating at least one thermomechanical property of the circuit layer image until all circuit layers in the substrate have been processed; and generating a 3-D representation of the selected one of the processing regions of the substrate including the plurality of circuit layer images as a function of the at least one thermomechanical property of each of the plurality of circuit layer images.

Method to extract and apply circuit features in organic substrate for automation of warp modeling

A method of estimating temperature of a transient nature of a thermal system, including, without a temperature measurement being made available, determining a drive current and thermal parameters of the thermal system.

A method for characterizing thermomechanical properties of an organic substrate includes the steps of: receiving an image of the substrate, the image including a geometric description of the circuit layers of the substrate; selecting a given one of the circuit layers for processing; converting the image to a 2-D FEM image of the given circuit layer; repeating the steps of selecting a given one of the circuit layers and converting the image to a 2-D FEM image of the selected layer until all of the layers have been processed; combining all of the 2-D FEM images corresponding to the layers to form a 3-D FEM image representing at least a portion of the substrate; determining a coefficient of thermal expansion (CTE), modulus and/or Poisson's ratio of the 3-D FEM image; and constructing a 3-D representation of the substrate as a function of the CTE, modulus and/or Poisson's ratio of the 3-D FEM image.

Characterizing thermomechanical properties of an organic substrate using three-dimensional finite element analysis

A method of mounting an electronic component on a substrate includes forming at least one trench in a surface of the substrate. The trenches formed in the substrate reduce a stiffness of the substrate, which provides less resistance to shear. Accordingly, the trenches reduce the amount of strain on the joints, which mount the electronic component to the substrate, which enhances the life of the joints.

A pattern matched pair of a front metal interconnect layer and a back metal interconnect layer having matched thermal expansion coefficients are provided for a reduced warp packaging substrate. Metal interconnect layers containing a high density of wiring and complex patterns are first developed so that interconnect structures for signal transmission are optimized for electrical performance. Metal interconnect layers containing a low density wiring and relatively simple patterns are then modified to match the pattern of a mirror image metal interconnect layer located on the opposite side of the core and the same number of metal interconnect layer away from the core. During this pattern-matching process, the contiguity of electrical connection in the metal layers with a low density wiring may become disrupted. The disruption is healed by an additional design step in which the contiguity of the electrical connection in the low density is reestablished.

Packaging substrate having pattern-matched metal layers

A MEMs-based system (and method), includes a sensor array including at least two sensors providing a basis for ensemble averaging.

System and method for sensor replication for ensemble averaging in micro-electromechanical system (MEMS)

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New Rochelle, NY, United States of America

Arun Sharma