Qualcomm Incorporated

Other

International Business Machines Corporation

Intel Corporation

Arun Raman

Han Zhao

Tushar Kumar

Pablo Montesinos Ortego

Aravind Natarajan

Gheorghe Calin Cascaval

Behnam Robatmili

Hui Chao

Dario Suarez Gracia

Wenjia Ruan

Wenhao Jia

Mark N Wegman

Govindarajan Krishnamurthi

Sebastian Winkel

Eran Yahav

Martin Vechev

Jaroslaw Topp

Rakesh Ranjan

Ulrich Bretthauer

Shaizeen Aga

Greta Yorsh

Gregor Stellpflug

Rainer Theur

Embodiments include computing devices, apparatus, and methods implemented by a computing device for task scheduling in the presence of task conflict edges on a computing device. The computing device may determine whether a first task and a second task are related by a task conflict edge. In response to determining that the first task and the second task are related by the task conflict edge, the computing device may determine whether the second task acquires a resource required for execution of the first task and the second task. In response to determining that the second task fails to acquire the resource, the computing device may assign a dynamic task dependency edge from the first task to the second task.

Method for efficient task scheduling in the presence of conflicts

Various embodiments may include a computing device analyzing an image to identify one or more elements of interest in the image, identifying concepts associated with elements of interest in the image, and identifying potential elements of interest and potential concepts that are not included in the image using other information. Various embodiments may include presenting the one or more elements of interest, the one or more potential elements of interest, and the one or more concepts, receiving a user input that selects one or more of the one or more elements of interest, the one or more potential elements of interest, and the one or more concepts identified in the identified elements of interest and concepts or any combination thereof for a target image, and generating the semantic representation of the target image based on the selected elements of interest and concepts.

System and method of generating a semantic representation of a target image for an image processing operation

Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.

Geometric work scheduling with dynamic and probabilistic work trimming

Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.

Speculative loop iteration partitioning for heterogeneous execution

Aspects include computing devices, systems, and methods for implementing scheduling and execution of lightweight kernels as simple tasks directly by a thread without setting up a task structure. A computing device may determine whether a task pointer in a task queue is a simple task pointer for the lightweight kernel. The computing device may schedule a first simple task for the lightweight kernel for execution by the thread. The computing device may retrieve, from an entry of a simple task table, a kernel pointer for the lightweight kernel. The entry in the simple task table may be associated with the simple task pointer. The computing device may directly execute the lightweight kernel as the simple task.

Method for simplified task-based runtime for efficient parallel computing

Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.

Managing data flow in heterogeneous computing

Embodiments include computing devices, systems, and methods identifying enhanced synchronization operation outcomes. A computing device may receive a first resource access request for a first resource of a computing device including a first requester identifier from a first computing element of the computing device. The computing device may also receive a second resource access request for the first resource including a second requester identifier from a second computing element of the computing device. The computing device may grant the first computing element access to the first resource based on the first resource access request, and return a response to the second computing element including the first requester identifier as a winner computing element identifier.

Identifying enhanced synchronization operation outcomes to improve runtime operations

Methods, devices, systems, and non-transitory process-readable storage media for a multi-processor computing device to schedule multi-versioned tasks on a plurality of processing units. An embodiment method may include processor-executable operations for enqueuing a specialized version of a multi-versioned task in a task queue for each of the plurality of processing units, wherein each specialized version is configured to be executed by a different processing unit of the plurality of processing units, providing ownership over the multi-versioned task to a first processing unit when the first processing unit is available to immediately execute a corresponding specialized version of the multi-versioned task, and discarding other specialized versions of the multi-versioned task in response to providing ownership over the multi-versioned task to the first processing unit. Various operations of the method may be performed via a runtime functionality.

Efficient scheduling of multi-versioned tasks

Embodiments include computing devices, systems, and methods for task signaling on a computing device. Execution of a task by an initial thread on a critical path of execution may be interrupted to create at least one parallel task by the initial thread that can be executed in parallel with the task executed by the initial thread. An initial signal indicating the creation of the at least one parallel task to a relay thread may be sent by the initial thread. Execution of the task by the initial thread may resume before an acquisition of the at least one parallel task.

Task signaling off a critical path of execution

A computing device may be configured to generate and execute a task that includes one or more blocking constructs that each encapsulate a blocking activity and a notification handler corresponding to each blocking activity. The computing device may launch the task, execute one or more of the blocking constructs, register the corresponding notification handler for the blocking activity that will be executed next with the runtime system, perform the blocking activity encapsulated by the blocking construct to request information from an external resource, cause the task to enter a blocked state while it waits for a response from the external resource, receive an unblocking notification from an external entity, and invoke the registered notification handler to cause the task to exit the blocked state and/or perform clean up operations to exit/terminate the task gracefully.

Notification of blocking tasks

A method and computing device, for enabling selective enforcement of complex task dependencies. The method and allows a computing device to determine whether to enforce task-dependencies based on programmer or end-user goals concerning efficiency and quality of runtime experience. A computing device may be configured to schedule executing a first task, identify an operation (e.g., a '+&#x3e;' operation) of the first task as being selectively dependent on a second task finishing execution, and determining whether to enforce the dependency of the first task on the second task based on an evaluation of one or more enforcement conditions. If the enforcement conditions are not met, enforcing the dependency, executing the second task, and withholding execution of the first task until execution of the second task has finished. If the enforcement conditions are met, commencing execution of the first task prior to, or parallel to the second task finishing execution.

Devices and methods implementing operations for selective enforcement of task dependencies

A computing device (e.g., a mobile computing device, etc.) may be configured to may be configured to better exploit the concurrency and parallelism enabled by modern multiprocessor architectures by identifying a sequence of tasks via a task dependency controller, commencing execution of a first task in the sequence of tasks, and setting a value of a register so that each remaining task in the sequence of tasks executes after its predecessor task finishes execution without transferring control to a runtime system of the computing device. The task dependency controller may be a hardware component that is shared by the processor cores and/or otherwise configured to transfer control between tasks executing on different processor cores independent of the runtime system and/or without performing the relatively slow and memory-based inter-task, inter-thread or inter-process communications required by conventional solutions.

Method and system for accelerating task control flow

A system includes a processor with a front end to receive an instruction stream reordered by a software scheduler and including a plurality of memory operations and alias information indicating how a given memory operation may be evaluated. Furthermore, the processor includes a hardware scheduler to reorder, in hardware, the instruction stream for out-of-order execution. In addition, the processor includes a calculation module to determine, for a given memory operation and based upon the alias information, a checking range of memory atoms subsequent to the given memory operation and a virtual order of the memory operation. The virtual order indicates an original ordering of the instructions. The processor also includes an alias unit to reorder the instruction stream, determine whether the hardware reordering caused an error, and determine whether the software reordering caused an error based upon the checking range and the virtual order.

Instruction and logic for memory disambiguation in an out-of-order processor

Embodiments include computing devices, systems, and methods for task-based handling of repetitive processes in parallel. At least one processor of the computing device, or a specialized hardware controller, may be configured to partition iterations of a repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. Upon completing a task, remaining divisible partitions of the repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task or a newly initialized task. Information about the iteration space for a repetitive process may be stored in a descriptor table, and status information for all partitions of a repetitive process stored in a status table. Each processor core may have an associated local table that tracks iteration execution of each task, and is synchronized with the status table.

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Fremont, CA, United States of America

Arun Raman