Applied Materials, Inc.

Arulkumar P Shanmugasundram

Alexander T Schwarm

Dmitry Lubomirsky

Timothy Weidman

Ian A Pancham

Sergey D Lopatin

Yuri Kokotov

Jacques Seror

Efim Entin

Hongbin Fang

Yossi Fisher

Michael Xiaoxuan Yang

Jay D Pinson, Ii

Gopalakrishna B Prabhu

Russell C Ellwanger

Boguslaw A Swedek

Doyle E Bennett

Allen L D'Ambra

Moshe Sarfaty

Kapila P Wijekoon

Michael P Stewart

Yaxin Wang

Ramin Emami

Young Jeen Paik

David J Eaglesham

Jehuda Hartman

Fang Mei

Terry P Reiss

Ramakrishna Cheboli

Shalomo Sarel

Manoocher Birang

Mehul B Naik

Christopher Dennis Bencher

Tetsuya Ishikawa

Alexander N Lerner

Ming Xi

Farhad K Moghadam

Son Truong Nguyen

Rong Pan

Suketu Arun Parikh

Martin Jay Seamons

Anh Ngoc Nguyen

Henry Ho

Lily L Pang

Amit Khandelwal

Helen R Armer

Nicolay Kovarsky

Josh Harris Golden

Dimitris Lymberopoulos

Yeuk-Fai Edwin Mok

Zhize Zhu

Ilias Iliopoulos

Bernardo Donoso

William R Bartlett

Yevgeniy Rabinovich

Manuel Hernandez

Alexander Parkhomovsky

Jim Tobin

Svetlana Sherman

Yevgeniy (Eugene) Rabinovich

Eric B Britcher

Avgerinos V (Jerry) Gelatos

Amna Mohammad

Arnold Aronson

Rodney Lum

A method of controlling surface non-uniformity of a wafer in a polishing operation includes (a) providing a model for a wafer polishing that defines a plurality of regions on a wafer and identifies a wafer material removal rate in a polishing step of a polishing process for each of the regions, wherein the polishing process comprises a plurality of polishing steps, (b) polishing a wafer using a first polishing recipe based upon an incoming wafer thickness profile, (c) determining a wafer thickness profile for the post-polished wafer of step (b), and (d) calculating an updated polishing recipe based upon the wafer thickness profile of step (c) and the model of step (a) to maintain a target wafer thickness profile. The model can information about the tool state to improve the model quality. The method can be used to provide feedback to a plurality of platen stations.

Feedback control of a chemical mechanical polishing device providing manipulation of removal rate profiles

Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.

Electroless deposition process on a silicon contact

Feedback control of chemical mechanical polishing device providing manipulation of removal rate profiles

Techniques for controlling an output property during wafer processing include forwarding feedforward and feedback information between functional units in a wafer manufacturing facility. At least some embodiments of the invention envision implementing such techniques in a copper wiring module to optimize a sheet resistance or an interconnect line resistance. Initially, a first wafer property is measured during or after processing by a plating process. Subsequently, the wafer is forwarded to a polishing process. A second wafer property is then measured during or after processing by the second process. At least one of these first and second wafer properties are used to optimize the second process. Specifically, one or more target parameters of a second process recipe are adjusted in a manner that obtains a desired final output property on the wafer by using these first and second wafer properties.

Copper wiring module control

A method, system, and medium of modeling and/or for controlling a manufacturing process is disclosed. The method includes the steps of identifying one or more input parameters that cause a change in output characteristics, defining global nodes using estimated maximum and minimum values of the input parameters, and defining a mathematical equation that calculates a predicted output characteristic for each node. The method also includes the steps of receiving at least one empirical data point having one or more input parameter values and at least one empirical output value and adjusting the predicted output values at the nodes based on a difference between the at least one empirical output value and the predicted output characteristic calculated using the mathematical equation based on the one or more input parameter values.

Method, system and medium for controlling manufacturing process using adaptive models based on empirical data

A method, system, and medium of modeling and/or for controlling a manufacturing process is disclosed. In particular, a method according to embodiments of the present invention includes calculating a set of predicted output values, and obtaining a prediction model based on a set of input parameters, the set of predicted output values, and empirical output values. Each input parameter causes a change in at least two outputs. The method also includes optimizing the prediction model by minimizing differences between the set of predicted output values and the empirical output values, and adjusting the set of input parameters to obtain a set of desired output values to control the manufacturing apparatus. Obtaining the prediction model includes transforming the set of input parameters into transformed input values using a transformation function of multiple coefficient values, and calculating the predicted output values using the transformed input values.

Method, system and medium for controlling manufacture process having multivariate input parameters

A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100&#xb0; C., and depositing a low dielectric constant material.

Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop

An electroless deposition system is provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate a surface of a substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate transfer shuttle positioned to transfer substrates between the first and second processing stations. The system also includes a substrate transfer robot positioned on the mainframe and configured to access an interior of the processing enclosure. The system also includes a substrate a fluid delivery system that is configured to deliver a processing fluid by use of a spraying process to a substrate mounted in the processing enclosure.

Apparatus for electroless deposition of metals onto semiconductor substrates

Systems, methods and mediums are provided for dynamic adjustment of sampling plans in connection with a wafer (or other device) to be measured. The invention adjusts the frequency and/or spatial resolution of measurements on an as-needed basis when one or more events occur that are likely to indicate an internal or external change affecting the manufacturing process or results. The dynamic metrology plan adjusts the spatial resolution of sampling within-wafer by adding, subtracting or replacing candidate points from the sampling plan, in response to certain events which suggest that additional or different measurements of the wafer may be desirable. Further, the invention may be used in connection with adjusting the frequency of wafer-to-wafer measurements.

Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing

Systems, methods and mediums are provided for dynamic adjustment of sampling plans in connection with a wafer (or other device) to be measured. A sampling plan provides information on specific measure points within a die, a die being the section on the wafer that will eventually become a single chip after processing. There are specified points within the die that are candidates for measuring. The stored die map information may be retrieved and translated to determine the available points for measurement on the wafer. The invention adjusts the frequency and/or spatial resolution of measurements when one or more events occur that are likely to indicate an internal or external change affecting the manufacturing process or results. The increase in measurements and possible corresponding decrease in processing occur on an as-needed basis. The dynamic metrology plan adjusts the spatial resolution of sampling within-wafer by adding, subtracting or replacing candidate points from the sampling plan, in response to certain events which suggest that additional or different measurements of the wafer may be desirable. Where there are provided a number of candidate points in the die map in the area to which points are to be added, subtracted, or replaced, the system can select among the points. Further, the invention may be used in connection with adjusting the frequency of wafer-to-wafer measurements.

An electroless deposition system and electroless deposition stations are provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate a surface of a substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate shuttle positioned to transfer substrates between the first and second processing stations. The electroless deposition station also includes various fluid delivery and substrate temperature controlling devices to perform a contamination free and uniform electroless deposition process.

Embodiments of the invention provide methods for forming conductive materials within contact features on a substrate by depositing a seed layer within a feature and subsequently filling the feature with a copper-containing material during an electroless deposition process. In one example, a copper electroless deposition solution contains levelers to form convexed or concaved copper surfaces. In another example, a seed layer is selectively deposited on the bottom surface of the aperture while leaving the sidewalls substantially free of the seed material during a collimated PVD process. In another example, the seed layer is conformably deposited by a PVD process and subsequently, a portion of the seed layer and the underlayer are plasma etched to expose an underlying contact surface. In another example, a ruthenium seed layer is formed on an exposed contact surface by an ALD process utilizing the chemical precursor ruthenium tetroxide.

Process for electroless copper deposition

Growing community of inventors

Sunnyvale, CA, United States of America

Arulkumar P Shanmugasundram