Intel Corporation

Tahoe Research, Ltd.

Arthur Jeremy Runyan

Nausheen Ansari

Richmond Hicks

Narayan Biswal

Paul S Diefenbaugh

Jason Daniel Tanner

Vishal Ravindra Sinha

Kathy Bui

Yifan Li

Abhishek R Appu

Joydeep Ray

Sang-Hee Lee

Gary K Smith

Changliang Wang

Scott R Janus

Nilesh V Shah

Michael N Derr

Ya-Ti Peng

Keith W Rowe

Robert J Johnston

Gary Smith

Satyanarayana Avadhanam

Wen-Fu Kao

Prashant D Chaudhari

Shirley Huang Meterelliyoz

Stanley J Baran

Jong Dae Oh

Atthar H Mohammed

Hiu-Fai R Chan

Todd M Witter

Ajay Saini

Yong-Joon Park

Ankur N Shah

Kunjal ShyamKumar Parikh

Satya N Yedidi

Gustavo P Espinosa

Shailendra Singh Chauhan

Bradley T Coffman

Fong-Shek Lam

Ivan Rodrigo Herrera Mejia

Daniel Knollmueller

Sameer Kalathil Perazhi

Digant H Solanki

Ratheesh Purushothaman Nair

Jonathan Oder

Shah Shah

Often when there is a glare on a display screen the user may be able to mitigate the glare by tilting or otherwise moving the screen or changing their viewing position. However, when driving a car there are limited options for overcoming glares on the dashboard, especially when you are driving for a long distance in the same direction. Embodiments are directed to eliminating such glare. Other embodiments are related to mixed reality (MR) and filling in occluded areas.

Glare and occluded view compensation for automotive and other applications

Particular embodiments described herein provide for an electronic device that includes two or more displays and a BIOS. On startup, before the premem state and MRC initialization of the boot process, the BIOS causes power to be enabled to two or more displays. A display engine determines if a hot plug for each display is asserted and for each display where the hot plug was not asserted, the path to the display where the hot plug was not asserted is closed. In an example, the BIOS communicates the signal to power enable the first display and the second display after general-purpose input/output initialization during the boot process. After the premem stage and MRC initialization are completed, the first display and the second display are both configured to begin to display pixels.

Similar boot time for multiple displays

Systems, apparatuses and methods may include a source device that generates a scene change notification in response to a movement of a camera, modifies an encoding scheme associated with the video content captured by the camera in response to the scene change notification, identifies a full-frame difference threshold, wherein scene analysis information includes frame difference data, and compares the frame difference data to an intermediate threshold that is less than the full-frame difference threshold, wherein the scene change notification is generated when the frame difference data exceeds the intermediate threshold. A sink device may obtain transport quality data associated with video content, modify an output parameter of a display based on the transport quality data, determine a view perspective of a still image containing a plurality of image slices, retrieve only a subset of the plurality of image slices based on the view perspective and decode the retrieved subset.

Technology to accelerate scene change detection and achieve adaptive content display

Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.

Dynamic sleep for a display panel

Techniques for selective display frame fetching are disclosed. Some example techniques disclosed herein cause at least one processor to at least determine if an indication of a new frame includes an indication of a flip event, and identify one or more dirty regions of the new frame based on the flip event. Disclosed example techniques also cause the at least one processor to fill a display buffer with the one or more dirty regions of the new frame, scan out the one or more dirty regions of the new frame from the display buffer to a display port, and apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame.

Devices and methods for selective display frame fetch

The systems and methods described herein provide the ability to detect a clocking element fault within an IC device and switch to an alternate clock. In response to detection of a fault in a phase-lock-loop (PLL) clocking element, the device may switch to an alternate clock so that error reporting logic can make forward progress on generating error message. The error message may be generated within an Intellectual Property (IP) cores (e.g., IP blocks), and may send the error message from the IP core to a system-on-a-chip (SOC), such as through an SOC Functional Safety (FuSA) error reporting infrastructure. In various examples, the clocking error may also be output to a hardware SOC pin, such as to provide a redundant path for error indication.

IPS SOC PLL monitoring and error reporting

Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can obtain an indication of a new frame and, in response to the indication of the new frame not including an indication of a flip completion event: (i) fill the display buffer with the new frame; (ii) scan out the new frame from the display buffer to a display port; and (iii) apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame.

Methods, apparatus, systems and articles of manufacture are disclosed for reduced computing device power consumption. Example methods disclosed herein includes detecting frame updates corresponding to input frames to be presented by a display, and causing a programmable timer to generate second interrupts corresponding to first interrupts generated by a display engine, the second interrupts to be generated when there are no frame updates detected for at least a first duration of time defined by a first threshold. Example methods further include causing the display engine to transition to a low power state when (1) the programmable timer is configured to generate the second interrupts and (2) no frame updates have been detected for at least a second duration of time following the first duration of time, the second duration of time defined by a second threshold.

Apparatus and methods for reduced computing device power consumption

Upon external display configuration change, a graphics display driver or any suitable hardware or software modifies the clock frequency of the processor core (e.g., graphics processor core) display engine. The graphics display driver or any suitable hardware or software reprograms the core display clock PLL (CDCLK PLL) to a new frequency, without any dead clocks during such frequency change. A divide-by-2 divider changes the frequency of the PLL on the fly or dynamically. The technique may not require the PLL to be turned off and turned back again at all.

Method and apparatus for dynamically changing display clock frequency

In one embodiment, an apparatus having an integrated circuit made of substrate, at least three light emitters arranged on the substrate, and driver circuitry located on the integrated circuit, the driver circuitry to drive an ultra low persistence display to remove ghosting and nausea.

Mechanisms for reducing latency and ghosting displays

Systems and methods may provide for using one or more stereoscopic devices for gesture control and tracking in a head mounted display (HMD). Each of the one or more stereoscopic devices may include a pair of dynamic vision sensors (DVS) arranged to have complementary fields of view (FOV) to detect one or more of a leading and a trailing edge of an object moving in a range or area to be detected. The DVS sensors determine how the object is moving based on a change in light intensity of pixels without having to detect, transfer, or process all of the pixels. The system and method may thereby provide motion tracking and gesture control functions at very low latency and processing bandwidth.

Using dynamic vision sensors for motion detection in head mounted displays

Various systems and methods for managing graphics subsystems are described herein. A system for managing graphics subsystems of a compute device includes a display controller operable to: receive an indication that a first display of the compute device has been activated; enable a power management feature in a display controller, the power management feature to reduce power consumption of the display controller and associated components, and the power management feature to reduce graphics memory bandwidth usage; receive an indication that a second display has been activated with the first display; and maintain the power management feature for at least the first display.

Video bandwidth optimization for multi-monitor systems

A system for reducing bandwidth and/or reducing power consumed by a display may comprise a display having a background plane and a region of interest plane that may be identified by a gaze tracker. The region of interest may be of a higher quality picture. In some embodiments, the display may be a large panel display and in others a head mounted display (HMD).

Display bandwidth reduction with multiple resolutions

Growing community of inventors

Folsom, CA, United States of America

Arthur Jeremy Runyan