Rca Inc.

Harris Corporation

Harris Semiconductor Patents Inc.

Arthur J Leidich

Robert H Isham

Raymond L Giordano

A dual discharge network is shown discharging any residual charge on the gates of MOSFET's used to protect a device from over voltages. The dual discharge networks are separately responsive to a positive or negative voltage at an input terminal such as an I/O input terminal, for example. Bias to each of the discharge networks is provided by the positive or negative I/O voltage and power to the transistors within each discharge network is provided by the MOSFET gate charges. In this way, a conduction path is formed between the positively and negatively charged MOSFET gates driving the gates towards ground, driving the MOSFETs to non-conduction and isolating a protected device from a I/O over-voltage where positive or negative.

Fail-safe MOS shutdown circuitry

A current source is selectively switched into the output circuit of a differential amplifier for producing hysteresis. In a circuit embodying the invention, a differential amplifier (diff-amp) stage operated at a first current level set by a first current source has first and second input terminals for the application therebetween of a differential input signal and first and second output nodes for the production of differential output signals. A second current source for inducing hysteresis is connected to one of the output nodes of the diff-amp and is selectively enabled. A differential input signal (VIN) is applied across the input terminals. When VIN varies in one direction and reaches a first threshold level, the second, hysteresis inducing, current source is enabled whereby a larger current can flow in the one node. VIN then has to vary in the opposite direction and reach a second threshold level to disable the second current source. When the first threshold level is reached the output of the amplifier stage switches from a first state to a second state and when the second threshold level is reached the output of the amplifier switches from the second state to the first state.

Differential amplifier with hysteresis

A CMOS fractional reference source or voltage divider circuit includes a string (chain) of CMOS pairs of transistors connected with their source-drain circuits in series and with ends of the string being connected across an input power (voltage) supply. The P-channel transistors are all matched to one another in a one to one ratio, the N-channel transistors are all similarly matched to one another. Output terminals are connected at the nodes between pairs of transistors. Accurate tracking of the voltage of the power supply is achieved by connecting each gate of the chain in a manner to insure the same source-to-gate voltage on each transistor of the pair. In the preferred form, the string comprises two pairs of CMOS transistors and the voltage appearing at the output terminal thereof is equal to one half of the voltage of the power supply.

CMOS voltage divider circuits

An amplifier circuit, having voltage gain responsive to a control signal, includes a transistor stage having a transistor and a load, and an amplifier stage in cascade connection, and a control transistor connected to the transistor. The control signal varies the collector current of the transistor via the control transistor whereby the voltage gain of the transistor stage correspondingly varies. Degenerative feedback couples the output to the input for stabilizing the quiescent output potential so that the amplifier circuit is susceptible of being direct coupled to subsequent circuits.

Amplifier circuit having controllable gain

First and second direct-coupled cascade connections of like numbers of transistors of the same conductivity type are connected in push-pull. The output stages have common-emitter and common-collector-amplifier transistors, respectively, while earlier stages have common-collector and common-emitter-amplifier transistors, respectively, the common-emitter-amplifier transistor working into a constant current generator collector load.

Class AB push-pull quasi-linear amplifiers

An electrically adjustable current divider means divides the output current of a constant current generator into a plurality of portions, a first of which is applied as tail current to a long-tailed-pair amplifier connection of transistors for controlling its voltage gain. At least one of the long-tailed-pair transistors has a resistive load; the quiescent value of the output voltage developed across this load has an undesirable tendency to exhibit shifts as gain is controlled. A second portion of divided output current from the constant current generator, exhibiting changes in magnitude complementary to those exhibited by the first portion, is applied to current-to-voltage converter means for developing voltage components to counteract the above-mentioned tendency towards shifts in the quiescent value of the output voltage as gain is controlled.

Amplifier with electrically controlled gain, with output suitable for

A current flows between the collector and emitter electrodes of a transistor responsive to an operating potential being impressed between them, the emitter-base junction of the transistor being forward biased by leakage current flowing across its own collector-base junction. Increase of the current flow between the collector and emitter electrodes of the transistor beyond a desired level is precluded by sensing the current flow, applying the sensed current to a current-to-voltage converter, and applying the resultant voltage to the input of a threshold detector. The output circuit of the threshold detector shunts current away from the emitter-base junction of the transistor when the current flow between its collector and emitter electrodes tends to exceed its desired level thereby to cause the voltage applied to the input circuit of the threshold detector to exceed a predetermined threshold value.

Reference current supply circuits

An amplifier including two long-tailed-pair configurations in cascade: the first including a pair of bipolar transistors having input signals coupled to their respective bases, their emitters connected to a source of quiescent operating current, and their collectors connected to respective constant current generator loads; and the second including a pair of field-effect transistors having gate electrodes coupled to receive signals from the respective collectors of the first and second bipolar transistors, their source electrodes connected to a source of quiescent operating current, and their drain electrodes connected to subsequent circuit means for deriving an output from at least one of them. By this arrangement substantially the maximum available voltage gain is obtained from the first long-tailed pair. The amplifier may be used as the input circuitry of an operational amplifier, for example, and is suitable for monolithic construction.

Amplifier circuit

A current amplifier is disclosed, the current gain of which varies directly with changes in input current. A first transistor, arranged as a slave mirroring transistor provides output signal current responsive to a multi-mode transistor master mirroring circuit. The master mirroring circuit includes two master mirroring transistors connected in parallel for receiving input signal current and generating potential for controlling the slave transistor. The first master mirroring transistor includes a serially connected resistor in its principal conduction path, which transistor being arranged to have higher conductance than the second master mirroring transistor, conditions it to receive substantially all of the input signal current for low values of signal and thereby establishing the circuit gain in accordance with the ratio of conductances of the first master and slave mirroring transistors. For higher input signal levels the potential developed across the serially connected resistor causes the input current to be diverted to the second master mirroring transistor thereby establishing the circuit gain in accordance with the conductance ratio of the slave and second master mirroring transistors.

Variable gain current amplifier

A limit is placed upon the maximum collector current available from a common-emitter transistor in the driver stage of an amplifier provided with overall feedback from its output stage following the driver stage to its input stage preceding the driver stage. This limit is imposed by saturation of a transistor in the input stage, which is of complementary conductivity type to the common-emitter transistor and which applies its collector current as base current to the common-emitter transistor, limiting the voltage applied to its base circuit. The common-emitter transistor in the driver stage is provided with emitter degeneration resistance, so limiting the voltage applied to its base circuit results in limiting the drive capability of the driver stage. This prevents the overall feedback increasing the output current of the driver stage so much it interferes with restriction of the base-current drive whenever a tendency towards overly large current flow through the output transistor is sensed. This forestalls increased dissipation in the output transistor that might damage or destroy it.

PNP Output short circuit protection

A current mirror receives as input current the leakage current through an auxiliary semiconductor pn junction, which leakage current emulates the leakage current of a similar semiconductor pn junction in a bipolar transistor used in the functional portion of the integrated circuit. The resulting output current of the current mirror is applied to counteract the effect of the leakage current.

Leakage current compensation circuit

A voltage comparator comprising first and second transistors of a first conductivity type receiving a current at an interconnection of their emitter electrodes has the collector of the first transistor connected to the base of a third transistor of a second conductivity type complementary to the first. Reference and bias potentials are applied respectively to the emitter of the third transistor and to the base of the second transistor; and input signal voltages to be compared to the bias potential are applied to the base of the first transistor. Input voltage swings to the reference potential are prevented from depriving the first transistor of sufficient collector potential to support flow of current from its collector to the base of the third transistor. This is done by inserting resistance between the source of input voltage and the base of the first transistor.

Level shifting circuit

A self-biasing amplifier stage including a first transistor arranged as a common emitter amplifier. A current amplifier is connected for receiving collector current from the first transistor responsive to which an output current is provided which is differentially summed with a constant current. The resultant difference current is integrated to generate a potential which potential is applied via a potential follower to the emitter electrode of the first transistor to adjust the current therethrough.

Self-biasing amplifier stage

An inductance and resistance in the present monostable circuit control the duration of the quasi-stable state of the circuit. A keyed clamp damps the ringing which tends to be produced by the resonant circuit comprising the inductance and the stray capacitances coupled thereto, after the circuit switches from its quasi-stable state back to its stable state and thereby prevents false re-triggering of the circuit.

Monostable circuit

A modified connection of elements in a push-pull transistor amplifier with driver circuitry providing over-current protection, which amplifier has previously been described by the present inventor in U.S. Pat. No. 3,855,540, increases the current gain through the push-pull transistor amplifier by a factor equal to the common-emitter forward current gain (h.sub.fe) of a transistor.

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Flemington, NJ, United States of America

Arthur J Leidich