Texas Instruments Corporation

Arthur C Hunter

Stephen P Hamilton

David Caldwell

Linda J Ferrio

Kenneth A Lies

Linda Jean Ferrio

Lloyd E Norman

Calculator having a keyboard in which one or more keys have labels created by a display and subject to changing interactively as the user desires. Typically, advanced scientific-programmable calculators may have too many functions to be adequately included on the keys of the keyboard associated therewith. In such calculators, certain functions require a plurality of keys to be actuated in order to be performed. Thus, such keyboards tend to be cluttered an confusing to the user. Thus, a keyboard is proposed having a small number of keys labeled with different functional labels as the user proceeds through a menu or tree structure containing all the desired functions. Keys in a certain group of keys on the keyboard are thereby subject to redefinition or relabeling so as to provide a variety of functions.

Calculator keyboard with user definable function keys and with

The equation operating system is an improved data and command entry format together with a compatible operation system for use with electronic data processing apparatuses, most particularly with scientific calculators which provide an alphanumeric display of entered equations. This invention provides a different set of commands and displayed characters for performing exponentiation. An up arrow together with a down arrow serve to define the expression of the exponent. The numeric data stored in a numeric display register upon implementation of the exponentiation is raised to the power of the expression between the up arrow and the down arrow. This invention also includes an integral power exponentiation command which enables easy entry of single digit positive integral exponents, thereby eliminating the need for a completing command.

Electronic data processing apparatus with equation operating system

The equation operating system is an improved data and command entry format together with a compatible operation system for use with electronic data processing apparatuses, most particularly with scientific calculators which provide an alphanumeric display of entered equations. This invention also includes a unary operation implementation technique, whereby the operand may be entered either before or after the unary operation.

The equation operating system is an improved data and command entry format together with a compatible operation system for use with electronic data processing apparatuses, most particularly with scientific calculators which provide an alphanumeric display of entered equations. This invention provides an implied multiplication having differing hierarchical ranks when one of a member of a predetermined prefix set entry is followed by one of two differing suffix set entries. Each of these implied multiplications have a differing hierarchical rank than that of explicit multiplication.

A data processing system having separate read-only memory and read-write memory integrated circuits coupled to a central processing unit via the same interface system. The data processing system is comprised of bus means having either command, address, or data signals present and conducted thereon. In the preferred embodiment, the bus means is comprised of a four binary digit bidirectional conductor bus coupling between the central processing circuit and the memory circuits. In the preferred embodiment, the data processing system is further comprised of processor means within said central processing unit coupled to the bus means for selectively transmitting selected ones of said command, data and address signals onto the bus means, said processor means further including means for receiving certain other ones of said data and address signals from the bus means; and memory means including, in the preferred embodiment, read-only memory circuits and read write memory circuits, coupled to the bus means (and to the processor means via the bus means), including means for selectively transferring data with the processor means in response to said received command and address signals being within a unique subset of commands and addresses. In the preferred embodiment, each separate individual circuit comprising the memory means includes the means for responding to the command signal received via the bus means and for storing or outputting address signals or data signals responsive to decoding said received command signal.

Memory system having a common interface

A memory interface system employs a communications protocol to distinguish between command signals, address signals and data signals appearing on the same bus lines. Each memory coupled to the bus lines detects the change between a default state on the bus lines and a command signal. A detector within each memory determines from the received command signal the type of memory operation to be performed and prepares the memory for that operation. These operations may include reading or writing data within specified locations in the memory or reading or writing within the program counter associated with the memory. The detector is only responsive to received command signals when a predetermined state follows the default state.

Memory interface system having combined command, address and data buss

A memory system includes a multiple memory pointer in which a pointer selection signal selects one of a plurality of memory pointers to generate an address signal for application to the memory for controlling the location of memory operations. In the preferred embodiment the memory is arranged in an X by Y matrix having X times Y individually addressable memory locations. A first pointer circuit has a plurality of address pointers, one of which is selected for generation of an X coordinate address. A second pointer circuit includes a single address pointer for generation of the Y coordinate address. The second pointer circuit may be a multiple pointer in an alternative embodiment. By provision of a number of individually addressable memories responsive to the same memory pointer system, separate application of address signals from differing address pointers to differing memories permits multiple memory operations in a single instruction cycle.

Multiple pointer memory system

An electronic apparatus having a keyboard and an output device, such as a thermal printer unit. The apparatus, including its printer unit, is burn-in tested by an electronic system built into the apparatus. The system includes a memory, a circuit for storing a preselected or predetermined alphanumeric code in the memory and a circuit for repetitively causing the printer unit to print the contents of the memory. A delay system may be incorporated which causes the apparatus to enter a wait mode between printing operations. The period of time that the system is in the wait mode may be either a fixed duration or of a selected duration. In the embodiment disclosed, the apparatus is an electronic calculator.

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Lubbock, TX, United States of America

Arthur C Hunter