International Business Machines Corporation

Tokyo Electron Limited

Arpan Pravin Mahorowala

Katherina E Babich

Dirk Pfeiffer

Marie Angelopoulos

Scott David Halle

David Robert Medeiros

Sean David Burns

Robert Neal Lang

Richard Stephan Wise

Allen H Gabor

Steven J Holmes

Alfred Grill

Timothy Joseph Dalton

Elbert Emin Huang

Wu-Song S Huang

Michael Straight Hibbs

S Jay Chey

Kenneth Christopher Racette

Karen Temple

Kangguo Cheng

Carl John Radens

Ramachandra Divakaruni

Wayne Martin Moreau

Richard Anthony Conti

Vishnubhai Vitthalbhai Patel

Ranee W Kwong

Deok-kee Kim

Harald F Okorn-Schmidt

Kenneth T Settlemyer, Jr

Scott D Allen

David V Horak

Daniel C Edelstein

Toshiharu Furukawa

Robert Dennis Miller

Ying Di Zhang

Ratnam Sooriyakumaran

Wesley Charles Natzle

Gregory Michael Wallraff

Phillip Joe Brock

David M Dobuzinsky

William J Cote

Maheswaran Surendra

Ari Aviram

Hongwen Yan

Karen Elizabeth Petrillo

Siddhartha Panda

Scott Arthur MacDonald

Koichiro Inazawa

C Richard Guarnieri

Sadanand Vinayak Deshpande

Gill Yong Lee

Tina Jane Wagner

Donald Clifford Hofer

Vaidyanathan Balasubramaniam

Jung H Yoon

Hiromasa Mochiki

Josef Michl

Prakash Chimanlal Dev

Wendy Yan

Annie Xia

Rich Wise

Soctt D Allen

Sadanand V Desphande

Dai Junyan

Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided which exhibit an interface of a chemical reaction, grain or material type which can be exploited to enhance either or both types of protection. Structures of such masks include TERA material which can be converted or hydrated and selectively etched using a mixture of hydrogen fluoride and a hygroscopic acid or organic solvent, and two layer structures of similar or dissimilar materials.

Methods and structures for protecting one area while processing another area on a chip

A lithographic structure comprising: an organic antireflective material disposed on a substrate, and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiObackbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.

Process of making a lithographic structure using antireflective materials

A lithographic structure comprising: an organic antireflective material disposed on a substrate; and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiObackbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.

A lithographic structure consisting essentially of: an organic antireflective material disposed on a substrate; a vapor-deposited RCHX material, wherein R is one or more elements selected from the group consisting of Si, Ge, B, Sn, Fe and Ti, and wherein X is not present or is one or more elements selected from the group consisting of O, N, S and F; and a photoresist material disposed on the RCHX material. The invention is also directed to methods of making the lithographic structure, and using the structure to pattern a substrate.

Process of making a semiconductor device using multiple antireflective materials

Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component.

Antireflective hardmask and uses thereof

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithographic structure is also provided.

Techniques for patterning features in semiconductor devices

A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NHand a hydrocarbon gas such as at least one of CH, CH, CH, CH, CH, CH, CH, CH, CH, CH, CH, CH, CH, CH, and CH. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH), and a passivation gas.

Method and apparatus for multilayer photoresist dry development

An antireflective composition and a lithographic structure comprising a silicon-metal oxide, antireflective material derived from the composition. The antireflective composition comprises a polymer of formula I, 

Antireflective composition and process of making a lithographic structure

Compositions and techniques for the processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask composition is provided. The composition comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO}, wherein n equals 8; and at least one chromophore moiety and transparent moiety. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO}, wherein n equals 8; and at least one chromophore moiety and transparent moiety.

Lithographic antireflective hardmask compositions and uses thereof

A multilayer lithographic structure which includes a substrate, having on a major surface thereof a first layer including a water and/or aqueous base soluble material which includes Ge, O, and H, and optionally X, wherein X is at least one of Si, N, and F; and disposed on the first layer a second layer which includes an energy photoactive material.

Water and aqueous base soluble antireflective coating/hardmask materials

A method and system is described for preparing a film stack, and forming a feature in the film stack using a plurality of dry etching processes. The feature formed in the film stack can include a gate structure having a critical dimension of approximately 25 nm or less. This critical dimension can be formed in the polysilicon layer using four mask layers.

Method and system for etching a film stack

Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA layer (used as an ARC and/or hardmask) with etch selectivity to the patterned photoresist, and etching to pattern transfer through a dielectric layer of nitride. This is accomplished by oxidizing a TERA layer after etching pattern transfer through the TERA layer to form an oxidized TERA layer having chemical properties similar to oxide. The methods provide all of the advantages of the TERA material and allows for high etch selectivity (approximately 5&#x2013;10:1) for etching to pattern transfer through nitride. In addition, the methodology reduces LER and allows for trimming despite reduced photoresist thickness.

Etch selectivity enhancement for tunable etch resistant anti-reflective layer

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Arpan Pravin Mahorowala