Intel Corporation

Arojit Roychowdhury

Ajaya V Durg

Ramanathan Sethuraman

Rajeev D Muralidhar

Tejpal Singh

Vishram Sarurkar

Rakesh Avichal Ughreja

Shilpa Huddar

Sunil Shanbhag

Methods and apparatus to permit a system low power consumption state when CPU (Central Processing Unit) or generically any compute element is active are described. In an embodiment, a fabric and a memory controller are caused to enter a low power consumption state at least partially in response to a determination that the fabric and the memory controller are idle. The entry into the low power consumption state occurs while a compute element, coupled to the fabric and the memory controller, is in an active state. Other embodiments are also disclosed and claimed.

Enabling system low power state when compute elements are active

The present disclosure describes techniques related to media caching. A media hub device may include a media hub device configured to execute an operation on a current frame of media having a frame period. The media hub device may include a cache configured to provide, to a media accelerator of the media hub device, data associated with the frame period of the current frame.

Media hub device and cache

An electronic apparatus may be provided that includes a clock device to provide a clock signal, and a clock gate to receive the clock signal, the clock gate to be selectively provided in an enabled state or a disabled state. The electronic apparatus may also include a controller to determine a frequency transition and to control the clock gate to be in the enabled state or the disabled state based on the determined frequency transition.

Dynamic clock gating frequency scaling

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Bengaluru, India

Arojit Roychowdhury