Mellanox Technologies, Ltd.

Qualcomm Incorporated

Arnon Sattinger

Dotan David Levi

Natan Manevich

Avraham Ganor

Ariel Almog

Bar Shapira

Christian Gregory Sporck

Shadi Hawawini

Wojciech Wasko

Nimer Khazen

Doron Fael

Jonathan Oliel

Ofir Sadeh

Amit Mano

Yossi Herzog

Maciej Machnikowski

Wojciech Waśko

Artiom Tsur

Reuven Kogan

Shahar Givony

In one embodiment, a system includes a digitally controlled oscillator (DCO) to generate a local clock having a local clock frequency, and clock synchronization circuitry to receive from a device a signal indicative of a remote clock frequency, compare measures of the remote clock frequency and the local clock frequency; generate a digital control command based on the comparison; and provide the digital control command to the DCO, wherein the DCO is to adjust the local clock frequency responsively to the digital control command.

Physical layer syntonization using digitally controlled oscillator

A pluggable module, for testing time-synchronization signals of network elements, includes a first connector for connecting to test equipment, a second connector for connecting to a network port of a network element, and at least one driver. The at least one driver is connected between the first and second connectors and is configured to buffer and relay a time-synchronization signal between the network element and the test equipment.

Time-synchronization testing in a network element

In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.

Scalable synchronization of network devices

A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

Software-controlled clock synchronization of network devices

Certain aspects of the present disclosure relate to methods and apparatus for wireless communication. In certain aspects, the apparatus generally includes a first interface configured to obtain, from a baseband module, a multiplexed signal comprising a control signal, a second interface configured to obtain a power signal, a radio frequency (RF) module, a regulator coupled to the second interface and configured to receive the power signal, and a circuit configured to provide the control signal to the regulator. In certain aspects, the regulator, in response to the control signal, may be configured to generate a supply voltage signal by regulating the power signal and provide the supply voltage signal to the RF module.

Efficient control mechanism in distributed antenna modules

Multiple power chargers for mobile terminals are disclosed. In particularly contemplated aspects, a mobile terminal may include two charging circuits arranged serially, such that only one charging circuit charges a battery of the mobile terminal at a time. The serial arrangement allows consolidation of fuel gauge circuitry within one of the charging circuits. In a particularly contemplated aspect, a second charger is tied to a first charger at a system power node. The system power node is further tied to a top port of the second charger. A bottom port of the second charger is tied to a top port of the first charger. A bottom port of the first charger is tied to the battery of the mobile terminal. The fuel gauge circuitry may sense battery current using a known ON resistance of a field effect transistor (FET) of the first charger.

Multiple power chargers for mobile terminals

Growing community of inventors

Zichron Yaakov, Israel

Arnon Sattinger