Abbott Diabetes Care Inc.

International Business Machines Corporation

Arni Ingimundarson

Martin J Fennell

Jean-Pierre Cole

Xuandong Hua

Theodore John Kunich

Lane Westlund

Burkhard Steinmacher-Burow

Markus Buehler

Thilo Maurer

Maarten Jakob Boersma

Niels Fricke

Benedikt Rombach

Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.

Systems, devices, and methods for revising or supplementing rom-based RF commands

Systems, devices, and methods for revising or supplementing ROM-based RF commands

Aspects of the disclosure relate to a processor core including an execution unit and a usage ratio controller. The execution unit is operable for executing a command forwarded to the execution unit. The usage ratio controller is operatively coupled with the execution unit. The usage ratio controller is operable for controlling a usage ratio of the execution unit. The usage ratio corresponds to the fraction of an observation time during which the execution unit is executing commands of an application. Other aspects of the disclosure relate to a method for detecting or analyzing a bottleneck in a processor core for a given application. The method includes controlling a usage ratio of at least one execution unit of the processor core and measuring the resulting application performance.

Partial computer processor core shutoff

A method to determine an oldest instruction in an instruction queue of a processor with multiple instruction threads, wherein each of the multiple instruction threads have a unique thread identifier. The method includes tagging each instruction thread, of the multiple instruction threads, in the instruction queue with a unique tag number according to a round-robin scheme, wherein the unique tag number includes the unique thread identifier for each instruction thread and a round number in the round-robin scheme. The method further includes selecting, for each instruction thread, of the multiple instruction threads, the instruction thread with a lowest tag number from the multiple instruction threads in the instruction queue that are tagged with an oldest round number from the round-robin scheme.

Method to determine the oldest instruction in an instruction queue of a processor with multiple instruction threads

A buffer is configured to store a plurality of last addresses accessed by a processor core from a memory. A minimum distance extraction circuit determines distances of a current memory address accessed by the processor core from each of the plurality of last addresses in the buffer and determines a minimum distance from the distances. A limit determination circuit compares the minimum distance to each of a plurality of ranges of distances and selects a range of the plurality of ranges within which the minimum distance falls. Each of a plurality of counters of a counter circuit is associated with a corresponding one of the plurality of ranges. A counter of the plurality of counters is to be incremented corresponding to the selected range.

Hardware apparatus to measure memory locality

Growing community of inventors

Karlsruhe, Germany

Arni Ingimundarson