Freescale Semiconductor,inc.

Arnaud Lachaise

Gerhard Trauth

Yean Ling Teo

A ring oscillator circuit comprising a plurality of stages operably coupled output-to-input in a ring configuration. A frequency tuning stage comprises an inverting logic gate and a delay component. The delay component comprises a first capacitive component comprising a first terminal operably coupled to an output of the inverting logic gate and a second terminal operably coupled to a first reference voltage at least when the ring oscillator is disabled. The delay component further comprises a further capacitive component comprising a first terminal operably coupled to the output of the inverting logic gate and a second terminal selectively couplable to the first reference voltage and a second reference voltage. The second terminal of the further capacitive component is arranged to be operably coupled to the first reference voltage when the ring oscillator is enabled, and operably coupled to the second reference voltage when the ring oscillator is disabled.

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Toulouse, France

Arnaud Lachaise