Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V.

Armin Klumpp

Peter Ramm

Christof Landesberger

Erwin Hacker

Michael Feil

Martin Bleier

Hermann Sigmund

Josef Weber

The invention relates to a vertical compound semiconductor structure having a substrate with a first main surface and an opposite second main surface, a vertical channel opening extending completely through the substrate between the first main surface and the second main surface and a layer stack arranged within the vertical channel opening. The layer stack includes an electrically conductive layer arranged within the vertical channel opening and a compound semiconductor layer arranged within the vertical channel opening. The compound semiconductor layer includes a compound semiconductor layer arranged on the electrically conductive layer and connected galvanically to the electrically conductive layer. Further, the invention relates to a method for producing such a vertical compound semiconductor structure.

Vertical semiconductor diode or transistor device having at least one compound semiconductor and a three-dimensional electronic semiconductor device comprising at least one vertical compound structure

Vertical compound semiconductor structure and method for producing the same

A method for manufacturing a three-dimensional, electronic system includes: providing a first integrated circuit structure in a first substrate, wherein the first integrated circuit structure has a first contact pad at a first main side of the first substrate; providing a second substrate with a second main side; forming a vertical contact area in the second substrate; after step (c) forming a semiconductor layer on the second main side of the second substrate; forming a semiconductor device of a second integrated circuit structure in the second substrate with the semiconductor layer; removing the substrate material from a side of the second substrate opposite the second main side, so that the vertical contact area at the opposite side is electrically exposed; arranging the first and second substrates on top of each other aligning the vertical contact area with the contact pad, so that an electrical connection between the first and second integrated circuit structures is produced via the vertical contact area and the contact pad.

Electronic system and method for manufacturing a three-dimensional electronic system

The present invention provides a mobile holder for a wafer, which comprises a base element, a first fixing means and a second fixing means. The first fixing means is configured to allow a wafer to be fixed to the base element. The second fixing means is configured to fix the mobile holder to a support for said mobile holder.

Mobile holder for a wafer

In a method of dicing a wafer, which comprises a plurality of individual circuit structures, a trench is first defined between at least two circuit structures on one face of the wafer. Subsequently, the trench is deepened down to a defined depth. Following this, one face of the wafer has fixed thereto a re-detachable intermediate support composed of a fixed intermediate support substrate and an adhesive medium which is applied to said intermediate support substrate and which can specifically be modified in terms of its adhesive strength, whereupon the wafer is dry-etched from the opposite face so that circuit chips are obtained which are connected to one another only via the intermediate support. Subsequently, the circuit chips are removed from the intermediate support. This method substantially reduces mechanical impairments that may occur during dicing of the circuit chips; on the one hand, this permits the production of circuit chips with a thickness of less than 50 &mgr;m and, on the other hand, it leads to mechanically substantially undamaged circuit chips.

Method of subdividing a wafer

The present invention relates to a method of connecting two semiconductor components comprising the steps of providing in a first main surface of a first semiconductor substrate first component structures including first contact areas, forming in said first semiconductor substrate via holes filled with electrically conductive material and electrically insulated from said first semiconductor substrate, said via holes extending down to the second main surface of the first semiconductor substrate and being connected in an electrically conductive manner to said first contact areas via an electrically conductive connection material on the first main surface of said first semiconductor substrate, forming on the second main surface of the first semiconductor substrate first lands which are connected in an electrically conductive manner to the first contact areas via the electrically conductive material in the via holes, providing on a second semiconductor substrate second component structures including second contact areas, forming second lands which are connected in an electrically conductive manner to the second contact areas, and connecting the first and the second semiconductor substrate in such a way that the electrical as well as the mechanical connection between the two substrates is established via the first and the second lands. By repeating the above-mentioned steps an arbitrary number of times, a three-dimensional integrated circuit can be produced by the method according to the present invention.

Method of vertically integrating electric components by means of back contacting

In a method of connecting a first and a second silicon wafer, the first silicon wafer is first provided with a polyimide layer on a main surface thereof. Subsequently, a plasma-induced reaction between the polyimide layer and water is performed. A plasma-induced reaction is also performed between a main surface of the second silicon wafer and chlorine. The main surface of the second silicon wafer is then subjected to a treatment with hydrolyzed triethoxysilylpropanamine. Following this, the surfaces of the two silicon wafers, which have been subjected to the plasma-induced reactions, are joined together so as connect the silicon wafers permanently.

Process for joining inorganic substrates in a permanent manner

Lacquer films sensitive to ultraviolet (UV) and/or electron beam radiation re applied to substrates as masking layers by a process known as the 'spin on process'. This invention is a new method of applying a lacquer film sensitive to UV and/or electron beam radiation. A vinyl-containing substance and a linear or cyclic siloxane are vaporized and then deposited onto the substrate to be masked. In the preferred embodiment of the invention, the substances utilized are octamethylcyclotetrasiloxane and trivinylmethylsilane.

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Munich, Germany

Armin Klumpp