U.S. Philips Corporation

Armand Pruijmboom

Ronald Dekker

Henricus G Maas

Ronald Koster

Willem Van Der Wel

Alexander C Jansen

Cornelis Eustatius Timmering

Wiebe B De Boer

Wilhelmus T Van Den Einden

Marguerite M Van Iersel-Schiffmacher

Peter H Kranen

Johanna M Van Rooij-Mulder

Matthias Jj Theunissen

A method of manufacturing a semiconductor device with a bipolar transistor (1) and a MOS transistor (2) formed in a silicon body (3) which for this purpose is provided with a field insulation region (4) by which semiconductor regions (6, 7) adjoining a surface (5) of said body are mutually insulated. A first region (6) is destined for the bipolar transistor and a second region (7) for the MOS transistor. The second region is provided with a gate dielectric (10). Then an electrode layer of non-crystalline silicon (11) is provided on the surface, which electrode layer is provided with a doping and in which electrode layer subsequently an emitter electrode (12) is formed on the first region and a gate electrode (13) on the second region. The electrode layer is provided with a doping by means of a treatment whereby a first dopant is provided at the area of the first region and a second dopant at the area of the second region, the first dopant being provided to a concentration such that the emitter zone of the transistor can be formed through diffusion from the emitter electrode to be formed in the electrode layer, while the second dopant is provided to a concentration lower than that of the first dopant. Owing to the comparatively low doping level, gate oxide breakdown is prevented during plasma etching and ion implantation.

Method of manufacturing a semiconductor device with a BiCMOS circuit

A method of a manufacturing a semiconductor device whereby a layer of insulating material and a layer of polycrystalline silicon are provided on a surface of a monocrystalline wafer. A window is then provided in the layer of polycrystalline silicon and a protective layer is formed on the wall of this window. Then the layer of insulating material is removed within the window and below an edge of the layer of polycrystalline silicon adjoining the window. Subsequently, silicon is selectively grown on the mono- and polycrystalline silicon exposed in and adjacent the window from a vapor comprising chlorine as well as silicon at low pressure. The silicon wafer is cleaned before the selective deposition through heating in an atmosphere comprising hydrogen at a pressure of at least 1 atmosphere. This cleaning safeguards that the deposited monocrystalline silicon will always be connected to the layer of polycrystalline silicon by the deposited polycrystalline silicon.

Manufacture of a semiconductor device with selectively deposited

A method of manufacturing a semiconductor device with a bipolar transistor (1) and a MOS transistor (2) formed in a silicon body (3) which for this purpose is provided with a field insulation region (4) by which semiconductor regions (6, 7) adjoining a surface (5) of said body are mutually insulated. A first region (6) is to be used for the bipolar transistor and a second region for the MOS transistor. The two regions are provided in that order with a gate dielectric layer (10) and an auxiliary layer (11) of non-crystalline silicon. The auxiliary layer and the gate dielectric layer are subsequently removed from the first region. Then an electrode layer (13) of non-crystalline silicon is deposited. An emitter electrode (15) is formed in the electrode layer on the first region, and a gate electrode (16) is formed both in the electrode layer and in the auxiliary layer on the second region. The electrode layer is subjected to a treatment whereby non-crystalline silicon is removed and whereby a layer of non-crystalline silicon is formed on the surface of the silicon body which has substantially the same thickness at the area of the first region and at the area of the second region. Overetching of the base zone (9) in the formation of the emitter is avoided thereby, so that the base zone may be comparatively thin.

Method of manufacturing a semiconductor device with BICMOS circuit

A semiconductor device with a bipolar transistor formed in a layer of semiconductor material (2) provided on an insulating substrate (1), in which material a collector zone (4), a base zone (5), and an emitter zone (6) are provided below a strip of insulating material (3) situated on the layer (2), which zones are connected to contact regions (7, 8, 9, 10) lying adjacent the strip (3), three of the contact regions (8, 9, 10) lying next to one another at a same side of the strip (3), of which two (8 and 9) are connected to the base zone (5) while the third (10), which lies between the former two (8 and 9), is connected to the emitter zone (6). The three contact regions (8, 9, 10) situated next to another at the same side of the strip (3) are provided alternately in the layer of semiconductor material (2) and in a further layer of semiconductor material (19) extending up to the strip (3). The three contact regions (8, 9, 10) connected to the base zone (5) and the emitter zone (6) may be provided with mutual interspacings which are smaller than the details which can be realised in a photoresist layer by means of the photolithographic process to be used in the manufacture of the transistor. As a result, the transistor can be manufactured with a very small extrinsic base.

Semiconductor device with a bipolar transistor formed in a layer of

A method of manufacturing a semiconductor device comprising a semiconductor body (1) with field insulation regions (14) formed by grooves (10; 24) filled with an insulating material (13) is disclosed. The grooves (10; 24) are etched into the semiconductor body (1) with the use of an etching mask (9) formed on an auxiliary layer (6) provided on a surface (5) of the semiconductor body (1). The auxiliary layer (6) is removed from the portion (11) of the surface (5) situated next to the etching mask (9) before the grooves (10; 24) are etched into the semiconductor body (1), and the auxiliary layer (6) is removed from the edge (12) of the surface (5) situated below the etching mask (9) after the grooves (10; 24) have been etched into the semiconductor body. Furthermore, a layer (13) of the insulating material is deposited on the semiconductor body (1), whereby the grooves (10; 24) are filled and the edge (12) of the surface (5) situated below the etching mask (9) is covered. Then the semiconductor body is subjected to a treatment whereby material is taken off parallel to the surface (5) down to the auxiliary layer (6), and finally the remaining portion of the auxiliary layer (6) is removed. Field insulation regions are thus formed which extend over an edge (12) of the active regions (15) surrounded by the field insulation regions (14) with a strip (18) which has no overhanging edge.

Method of manufacturing a semiconductor device having a semiconductor

A method of manufacturing a semiconductor device with a semiconductor element which includes a semiconductor zone (19) situated below an electrode (18) and adjoining a surface (5) of a semiconductor body (1), which semiconductor zone substantially does not project outside the electrode (18) in lateral direction. The electrode (18) is here formed on the surface (5) of the semiconductor body (1), after which semiconductor material adjoining the surface (5) and not covered by the electrode (18) is removed by an etching treatment, whereby the position of the semiconductor zone (19) below the electrode (18) is defined. Before the electrode (18) is formed, a surface zone (16) adjoining the surface (5) is formed in the semiconductor body (1) with a depth and a doping such as are desired for the semiconductor zone (19) to be formed below the electrode (18), after which the electrode (18) is formed on this surface zone and, during the etching treatment, the portion of the surface zone (16) not covered by the electrode (18) is etched away through its entire thickness. Conducting materials such as aluminium or aluminium alloys may be used for the electrode (18), i.e. materials which are not resistant to temperatures necessary for forming semiconductor zones through diffusion.

Method of manufacturing a semiconductor device whereby a laterally

A method of manufacturing a semiconductor device whereby an spacer is formed from a second layer in a fully self-registering manner after a layer portion of a first layer has been formed. For this purpose, the second layer and a masking layer are provided in that order, which masking layer has a greater thickness next to the layer portion than above it. The portion of the second layer situated above the layer portion and the spacer to be formed is then exposed in that the masking layer is etched back over at least substantially its entire surface. A portion of the masking layer then remains next to the layer portion, which masking layer portion is sufficiently thick for adequately protecting the subjacent portion of the second layer against the treatment which is subsequently carried out and by which the etching resistance of at least the top layer of the exposed portion of the second layer is increased. The non-treated portion of the second layer is then selectively etched relatively to the treated portion in order to form the spacer.

Growing community of inventors

Eindhoven, Netherlands

Armand Pruijmboom