Sun Microsystems, Inc.

Arjun P Chandran

Anup S Mehta

Gregg K Tsujimoto

In the Retirement Payload Array (RPA) of a microprocessor, the signal 'READ' is logically combined with the primary clock signal 'CLK' in a control circuit of a modified glitch latch such that the glitch latch will only reset, and therefore a reset edge or &#x201c;glitch&#x201d; will only appear, when new data is read and the signal IN will return to zero and allow the modified glitch latch to recover.

Modified glitch latch for use with power saving dynamic register file structures

In the Retirement Payload Array (RPA) of a microprocessor, the pointer advance signal 'ADVANCE POINTER' from the Instruction Retirement Logic (IRL) of the Instruction Scheduling Unit (ISU) is utilized to provide conditional read RPA signals. Consequently, according to the invention, a read of the RPA is completed only if it is determined that the read word line being read in the current cycle is not the same read word line that was read in the previous cycle.

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Sunnyvale, CA, United States of America

Arjun P Chandran