Ericsson Gmbh

Telefonaktiebolaget Lm Ericsson (Publ)

Qualcomm Incorporated

Aristotle Hadjichristos

David R Pehlke

Paul Wilkinson Dent

Erik L Bengtsson

William O Camp, Jr

Scott R Justice

Jeffrey A Schlang

Gurkanwal Singh Sahota

Nathan M Pletcher

Babak Nejati

Puay Hoe See

Marco Cassia

Thomas Myers

Yu Zhao

Guy Klemens

Charles Gore

Norman L Frederick, Jr

Steven G Cairns

Ron Boesch

Charles Gore, Jr

M Ali Khatibzadeh

A multi-mode multi-band power amplifier (PA) module is described. In an exemplary design, the PA module includes multiple power amplifiers, multiple matching circuits, and a set of switches. Each power amplifier provides power amplification for its input signal when selected. Each matching circuit provides impedance matching and filtering for its power amplifier and provides a respective output signal. The switches configure the power amplifiers to support multiple modes, with each mode being for a particular radio technology. Each power amplifier supports at least two modes. The PA module may further include a driver amplifier and an additional matching circuit. The driver amplifier amplifies an input signal and provides an amplified signal to the power amplifiers. The additional matching circuit combines the outputs of other matching circuits and provides an output signal with higher output power. The driver amplifier and the power amplifiers can support multiple output power levels.

Multi-mode multi-band power amplifier module

A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The phase locked loop that is responsive to the modulated signal includes a controlled oscillator output and a feedback loop between the controlled oscillator input and the controlled oscillator output. The feedback loop includes a mixer that is responsive to a local oscillator. The modulator may be placed in the phase locked loop. In particular, the modulator may be placed in the feedback loop between the controlled oscillator output and the mixer, between the local oscillator and the mixer, or between the mixer and the controlled oscillator input.

IQ modulation systems and methods that use separate phase and amplitude signal paths and perform modulation within a phase locked loop

A polar modulation transmitter circuit provides reduced ACPR in its output signal by controlling the relative delay between its envelope and phase modulation operations based on direct or indirect feedback measurement the output signal's ACPR. Such measurement and associated control may be based on a delay controller that includes an ACPR measurement circuit and a delay control circuit. Additionally, or alternatively, the polar modulation transmitter circuit provides a greatly extended transmit power control range by using a staged amplifier circuit that includes a driver amplifier circuit operating in combination with a power amplifier circuit to impart desired envelope modulation. In an exemplary embodiment, the driver amplifier circuit is implemented as differential transistor pairs responsive to tail current modulation. As such, the driver amplifier circuit is suited in particular for economical and space saving integration within a transmitter or transceiver integrated circuit (IC).

Polar modulation transmitter

A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The in-phase and quadrature-phase signals may be normalized in-phase and quadrature-phase signals. Alternatively, a phase tracking subsystem may be provided that is responsive to the quadrature modulator to produce a phase signal that is responsive to phase changes in the modulated signal and that is independent of amplitude changes in the modulated signal. An amplitude tracking subsystem also may be provided that is responsive to the modulator to produce an amplitude system that is responsive to amplitude changes in the modulated signal and that is independent of the phase changes in the modulated signal. An amplifier has a signal output, an amplitude control input and an output. The signal input is responsive to the phase signal and the amplitude control input is responsive to the amplitude signal.

IQ modulation systems and methods that use separate phase and amplitude signal paths

A radio frequency power amplifier circuit provides linear amplitude modulation of a radio frequency output signal while operating in a saturated amplification mode. The power amplifier circuit incorporates a lossy modulator that functions as a variable resistance responsive to an amplitude modulation signal. A supply voltage is coupled to the voltage supply input of the power amplifier circuit through the lossy modulator, such that the supply voltage applied to the power amplifier varies with the amplitude modulation signal. The radio frequency power amplifier circuit modulates the envelope of an RF output signal generated by saturated mode amplification of a constant envelope radio frequency input signal.

System and method of RF power amplification

Quadrature modulators include a quadrature splitter and a pair of Gilbert Multiplier Cells coupled to the quadrature splitter, each of which is biased in Class-B. The quiescent current bias in the Gilbert Multiplier Cells may be substantially zero. Each of the Gilbert Multiplier Cells may include a pair of cross-coupled, emitter-coupled transistor pairs transistor pairs and a driver circuit that is coupled to at least one of the emitter-coupled transistor pairs and that is biased in Class-B. The driver circuit may include at least one current mirror circuit that is coupled to at least one of the emitter-coupled transistor pairs. The driver circuit also may include at least one current source that selectively applies current to at least one of the emitter-coupled transistor pairs, more specifically by selectively applying current to the at least one current mirror circuit.

Class-B biased gilbert cells and quadrature modulators

Methods and systems for amplitude-modulating a power amplifier based on sensed current and sensed voltage provided to the power amplifier are provided. The sensed current and sensed voltage may be summed to provided both current and voltage feedback to modulate the power supplied to the power amplifier. Alternatively, both the current feedback and the voltage feedback may be selectively utilized to modulate the power supplied to the power amplifier.

High-level modulation method and apparatus

According to a second embodiment of the invention, a mobile phone receiver comprises a first down converter using a first local oscillator frequency which can be tuned in frequency steps by a programmable digital frequency synthesizer PLL which is locked to a reference frequency. The first down converter converts received signals to a first IF for filtering. A second down converter using a second local oscillator converts first IF signals to a second IF. The second local oscillator frequency is generated using a second digital frequency synthesizer PLL which locks the second oscillator to the reference frequency. A third down converter mixes the transmit frequency with the first local oscillator frequency to produce a lock frequency. A third digital frequency synthesizer PLL compares the lock frequency and the reference frequency to control generation of the transmit frequency.

On-channel transceiver architecture in a dual band mobile phone

A Gilbert Multiplier Cell includes an emitter-coupled transistor pair and a pair of cross-coupled emitter-coupled transistor pairs. A filter couples the emitter-coupled transistor pair to the pair of the cross-coupled emitter-coupled transistor pairs. The filter may include a pair of inductors or resistors, a respective one of which serially couples a respective one of the emitter-coupled transistor pair to a respective one of the pair of cross-coupled emitter-coupled transistor pairs, and a capacitor connected between the pair of inductors or resistors. A local oscillator is coupled to the pair of cross-coupled emitter-coupled transistor pairs and a data input is coupled to the emitter-coupled transistor pair. By low pass filtering the output of the emitter-coupled transistor pair that is applied to the pair of cross-coupled emitter-coupled transistor pairs, low noise floor Gilbert Multiplier Cells and quadraphase modulators may be provided.

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Apex, NC, United States of America

Aristotle Hadjichristos