Hitachi America, Ltd.

Hitachi, Ltd.

Arindam Saha

Avadhani Shridhar

Srinivas Mandavilli

Compressed data are decompressed using an inverse discrete cosine transform (IDCT). A first one directional (1D) IDCT is performed resulting in a plurality of first 1D IDCT coefficients followed by a second 1D IDCT resulting in a plurality of second 1D IDCT coefficients. In performing the first 1D IDCT and the second 1D IDCT a first plurality of intermediate butterfly computations are performed which include performing a plurality of intermediate multiplications resulting in a plurality of initial products and performing a plurality of intermediate additions resulting in intermediate product which are maintained at no more than 16-bits utilizing a round near positive (RNP) rounding scheme. Following the second 1D IDCT a rounding and shifting of the plurality of second 1D IDCT coefficients is performed utilizing a round away from zero (RAZ) rounding scheme resulting in a plurality of output coefficients which comply with the IEEE 1180 standard.

Implementation of an inverse discrete cosine transform using single instruction multiple data instructions

A method is disclosed for effectuating multiplication in a processor core. The method supports multiplication instructions for two formats of data: integer-formatted data and fixed-point data, exclusive of a floating point unit. The data can be packed data, including 16-bit packed data and 32-bit packed data.

Instructions for arithmetic operations on vectored data

A system and method that implement a butterfly operation for a fast fourier transform operation in a processor using a matrix-vector-multiply instruction. A first set of inputs to the butterfly operation are defined as r1&plus;j i1 and r2&plus;j i2, and a twiddle factor Wn is defined as Wn&equals;e &equals;cos(2&pgr;/N)&minus;j sin(2&pgr;/N)&equals;a&plus;jb. The butterfly operation stores r1, i1, r2 and i2 in a first set of registers and stores the twiddle factor in matrix registers. The matrix-vector-multiply instruction is executed between the matrix registers and the first set of registers.

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Sunnyvale, CA, United States of America

Arindam Saha