Texas Instruments Corporation

Ariel Dario Moctezuma

Hasibur Rahman

Srinath Hosur

Gary Franklin Chard

Hassan Pooya Forghani-Zadeh

William Robert Krenik

Alex Kwasi Nyavor Titriku

Timothy Bryan Merkin

Sujan Kundapur Manohar

Marius Vicentiu Dina

Yang Xu

Yanqing Li

An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.

Inductive current digital-to-analog converter (DAC) and related control options

A compensation circuit comprising: a first source having an output; a second source having an output; a first transistor having a first current terminal coupled to the output of the first source, a second current terminal coupled to ground and a first control terminal connected to the first current terminal; a second transistor having a second control terminal, a third current terminal coupled to the output of the second source and a fourth current terminal coupled to ground; a first resistor connected between the first control terminal and the second control terminal; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor connected to the second control terminal.

Low area frequency compensation circuit and method

A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.

Controlled slew rate current limited ramp down voltage control

An example apparatus includes: a receiver operable to receive a modulated input signal at a receiver input and output a demodulated signal at a receiver output, the receiver comprising a switch having a first current terminal and a first control terminal, the first current terminal coupled to the receiver output. The example apparatus includes a capacitor having a first terminal and a second terminal, the second terminal coupled to the first control terminal and the first terminal coupled to the receiver input. The example apparatus includes a resistor having a third terminal and a fourth terminal, the fourth terminal coupled to the first control terminal. The example apparatus includes a voltage offset source having an input and an output, the output coupled to the third terminal. The example apparatus includes a current source coupled to the first current terminal.

Methods and apparatus to demodulate an input signal in a receiver

An inductor has first and second terminals. A first switch is coupled between the first terminal and a voltage supply terminal. A second switch is coupled between the first terminal and a negative output supply terminal. A third switch is coupled between the second terminal and a positive output supply terminal. A fourth switch is coupled between the second terminal and a ground terminal. A controller is coupled to the first, second, third and fourth switches. The controller is configured to provide: an inductor charge mode; a positive boost mode; a negative boost mode; a first rest state in which the controller closes the first switch and opens the second, third and fourth switches; and a second rest state in which the controller closes the fourth switch and opens the first, second and third switches.

Single-input multiple-output (SIMO) converter having a controller with switchable rest states

An output buffer circuit includes an output terminal, a transistor, and a resistor. The transistor includes a first terminal coupled to the output terminal, a second terminal coupled to a ground rail, and a third terminal coupled to an output signal source. The resistor includes a first terminal coupled to a fourth terminal of the transistor, and a second terminal coupled to the ground rail.

Output buffer circuit

A system includes a switching converter circuit and a monitoring circuit coupled to the switching converter circuit. The monitoring circuit includes a current estimation circuit configured to estimate an output current of the switching converter circuit. The monitoring circuit also includes a compare circuit configured to compare the estimated average output current with a threshold, wherein the compare circuit is configured to output an alert signal in response to the estimated output current being greater than the threshold.

Switching converter with output current estimator circuit

A system includes an inductor, and a first switch coupled between a first end of the inductor and a voltage supply node. The system also includes a second switch coupled between the first end of the inductor and a negative output supply node, wherein the second switch comprises a self-operated arrangement. The system also includes a third switch coupled between a second end of the inductor and a positive output supply node. The system also includes a fourth switch coupled between the second end of the inductor and a ground node. The system also includes a controller coupled to the first, second, third, and fourth switches.

Switching converter with a self-operated negative boost switch

A system includes an inductor and a first switch coupled between a first end of the inductor and a voltage supply node. The system also includes a second switch coupled between the first end of the inductor and a negative output supply node. The system also includes a third switch coupled between a second end of the inductor and a positive output supply node. The system also includes a fourth switch coupled between the second end of the inductor and a ground node. The system also includes a controller coupled to the first, second, third, and fourth switches. The controller is configured to provide an inductor charge mode, a positive boost mode, a negative boost mode, a first rest state involving the first switch, and a second rest state involving the fourth switch.

In described examples, in response to a voltage at an external power terminal falling below a safe limit: a charge pump is operated at a first frequency to produce a voltage at a charge pump node; and a first controlled current is coupled from the charge pump node to a control terminal of a power switch transistor. The power switch transistor has a conduction path coupled between the external power terminal and an internal power terminal at which an internal power source is connected. In response to the voltage at the external power terminal reaching a selected level: the charge pump is operated at a second frequency, lower than the first frequency; and a second controlled current, lower than the first controlled current, is coupled from the charge pump node to the control terminal of the power switch transistor.

Fast turn-on power switch

In described examples, a switch has: a first current handling terminal coupled to a supply source terminal; and a second current handling terminal coupled to an output terminal. A comparator has: a first input coupled to the second current handling terminal; and a second input. A voltage reference source has: a first terminal coupled to the first current handling terminal; and a second terminal coupled to the second input of the comparator. A slew rate detector has an input coupled to the second current handling terminal. A switch controller has: a first input coupled to the comparator output; and a second input coupled to an output of the slew rate detector. The switch controller is coupled to output a signal to cause the switch to open when the comparator detects an over-current condition through the switch while the slew rate detector detects a negative slew rate.

Methods and apparatus for power switch fault protection

Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

Growing community of inventors

Richardson, TX, United States of America

Ariel Dario Moctezuma