National Semiconductor Corporation

Arie J Van Rhijn

Willem J Kindt

Rudolphe Gustave Hubertus Eschauzier

An apparatus and method is directed to a power amplifier control circuit that includes a bandwidth switching circuit. The power amplifier control circuit can be used in a GSM EDGE system for controlling the output power of a communication signal. The loop bandwidth of the power amplifier control circuit is high during ramp-up and ramp-down of the output power, and low during transmission of the communication signal. The power amplifier control circuit regulates the output power during power ramping, while preserving the amplitude modulation portion of the communication signal during transmission. The bandwidth switching circuit includes a pair of capacitance circuits that are arranged such that both capacitance circuits charge without affecting the loop bandwidth. The bandwidth switching circuit operates at high speeds associated with a GSM EDGE system, while avoiding transient glitches that may occur due to charging and discharging in the capacitance circuits.

Apparatus and method for a fast bandwidth switching circuit in a power amplifier control circuit

A cascode stage includes a gain boost circuit arrangement in a folded cascode type of operational amplifier. The gain boost circuit arrangement improves the overall DC gain of the operational amplifier while maintaining good low noise performance with the resistive loads. The cascode stage includes a current mirror circuit, resistive loads, and a regulated (or gain boosted) cascode circuit. The resistive loads are arranged to minimize thermal noise, while the regulated cascode circuit is arranged to increase the output impedance of a current mirror The increased output impedance results in higher DC gain in the operational amplifier. The increased DC gain and low noise characteristics may be implemented in bipolar and FET technologies.

High DC gain cascode amplifier stage with low noise performance

A method and apparatus are provided for adjusting an offset in an electronic circuit by shifting at least one threshold voltage of a MOS transistor in an electronic circuit. By biasing a transistor into hard saturation, with sufficient supply voltage, charge carriers will be injected into the oxide layer of the MOS transistor over a predetermined time interval. Injection of charge carriers into the oxide layer of a MOS transistor causes the absolute value of the MOS transistor threshold voltage to increase. The injection of charge carriers is used to either intentionally increase or decrease the offset voltage in an electronic circuit due to mismatched components, process variations or to improve overall system accuracy or performance. In an operational amplifier or comparator, systematic offset voltage is measured at the output of the amplifier, and the threshold voltages of the differential input stage transistors are adjusted accordingly. In a digital to analog converter using precision current sources, the output voltage is measured for various code bits and the current levels for each current source are adjusted by shifting the threshold voltages as required. Offset voltage or mismatches in currents may be shifted in packaged electronic parts. The hot carrier injection method and apparatus, does not alter the temperature coefficient of the electronic part, requires minimal additional circuitry in electronic circuits, and greatly improves the precision with which electronic circuits may be manufactured.

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Wassenaar, Netherlands

Arie J Van Rhijn