Monterey Design Systems, Inc.

Archie Li

James S Koford

Lawrence Thomas Pileggi

Douglas B Boyle

Majid Sarrafzadeh

Salil Ravindra Raje

Sharad Malik

Christopher J Dunn

Gary K Yeap

Feroze P Taraporevala

Abhijeet Chakraborty

David Gluss

Lilly Shieh

Robert E Shortt

Dennis Yamamoto

Tong Gao

Joseph T Rahmeh

Dinesh D Gaitonde

Eric McCaughrin

Emre Tuncer

Sam Jung Kim

Yau-Tsun Steven Li

Satamurthy Pullela

A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.

Method for design optimization using logical and physical information

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Mountain View, CA, United States of America

Archie Li