Texas Instruments Corporation

Aravind Miriyala

Sandeep Kesrimal Oswal

Ravikumar Pattipaka

Raja Sekhar Kanakamedala

Raja Reddy Patukuri

Vajeed Nimran P A

Aatish Chandak

Anand Hariraj Udupa

Vajeed Nimran

Shabbir Amjhera Wala

Hari Babu Tippana

Prabin Krishna Yadav

Saugata Datta

Naveen Kumar Ginige

Midhun Raveendran

An example apparatus includes: calibration circuitry configured to determine a second current at a second terminal of a second impedance circuit based on a first parasitic capacitance, a first impedance value, a third impedance value, a first voltage, and a second voltage; determine a third voltage at a second terminal of a second impedance circuit based on the first parasitic capacitance, a second impedance value, the third impedance value, the second voltage, and the second current; and determine a second parasitic capacitance between the second terminal of the second impedance circuit and the second terminal of a fifth impedance circuit based on the second current, the third voltage, a third current at the second terminal of the fifth impedance circuit, and a fourth voltage at the second terminal of the fifth impedance circuit.

Methods and apparatus for determining parasitic capacitances

An ultrasound system includes a transmit-receive switch. The transmit-receive switch includes a combined transmit-receive and return-to-zero (RTZ) path. The combined transmit-receive and RTZ path includes a transistor with a first current terminal, a second current terminal, and a control terminal. The second current terminal of the transistor is coupled to a ground node via a first switch and is coupled to a receive node via a second switch. The ultrasound system also includes a receiver front-end circuit coupled to the receive node.

Ultrasound transmit-receive switch with combined transmit-receive and return-to-zero path

An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.

AC-coupled electrocardiogram signal acquisition system with enhanced common mode rejection

Methods and apparatus for reducing a transient glitch in ultrasound applications are disclosed. An example apparatus includes a transducer to (A) output a signal during a transmit phase and (B) receive a reflected signal corresponding to the signal during a receive phase; a receiver switch coupled to the transducer at a first node, the receiver switch to (A) open during the transmit phase and (B) close during the receive phase; and a clamp coupled to the transducer at the first node, the clamp to provide a high impedance during the transmit phase and the receive phase and provide a low impedance during a transient phase.

Methods and apparatus for reducing a transient glitch in ultrasound applications

The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.

High accuracy impedance measurement

A semiconductor device includes a trim storage and an encoder. The trim storage stores trim values. The encoder determines a magnitude of a supply voltage, determines a magnitude of a handle voltage, determines a source-to-handle voltage of a first transistor, and determines a source-to-handle voltage of a second transistor. Further, the encoder determines a target number of selectable first transistor units comprising the first transistor to select for the first transistor. Based on a trim value from the trim storage, the source-to-handle voltage of the first transistor and the source-to-handle voltage of the second transistor, the encoder determines a target number of selectable second transistor units comprising the second transistor to select for the second transistor. The encoder asserts control signals to select the target number of selectable first transistor units and the target number of selectable second transistor units.

Configurable pulser circuit operable across a range of supply voltages

The disclosure provides a level shifter. The level shifter includes a first logic block that receives an input signal and generates a primary pulsed input. A first transistor is coupled to the first logic block and a first node. A gate terminal of the first transistor receives the primary pulsed input. A latch is coupled to the first node and a second node. A second logic block receives the input signal and generates a secondary pulsed input. A second transistor is coupled between the second logic block and the second node. A gate terminal of the second transistor receives the secondary pulsed input.

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Bengaluru, India

Aravind Miriyala