Skyworks Solutions, Inc.

Apostolos Samelis

Grant Darcy Poulin

Edward John Wemyss Whittaker

Richard S Burton

Kyushik Hong

Kevin Choi

Alasdair Bruce

Michael John Ball

Neal J Tuffy

A load-insensitive power amplifier power detector that excludes the use of couplers is disclosed. The load-insensitive power amplifier power detector may include a voltage sampling circuit in electrical communication with a collector of a power amplifier and configured to sample a first voltage from the power amplifier. The load-insensitive power amplifier power detector may include a current sampling circuit in electrical communication with the collector of the power amplifier and configured to sample an output current from the power amplifier. Further, the load-insensitive power amplifier power detector may include a current-to-voltage converter connected between the voltage sampling circuit and an output of the load-insensitive power amplifier power detector. The current-to-voltage converter may be configured to convert the output current to obtain a second voltage. Moreover, a combination of the first voltage and the second voltage may form a detector voltage corresponding to an incident power of the power amplifier.

Load insensitive power detection

A power amplifier module that includes a power amplifier having a plurality of amplifier gain stages, a memory device including a plurality of memory locations, and a controller to receive a control signal having at least one of a first state and a second state. The plurality of memory locations includes at least one first memory location to store a first set of configuration parameters for operation in a first mode, and at least one second memory location to store a second set of configuration parameters for operation in a second mode. The controller configures the power amplifier module in the first mode based on the first set of configuration parameters responsive to receiving the control signal having the first state and configures the power amplifier module in the second mode based on the second set of configuration parameters responsive to receiving the control signal having the second state.

Multi-mode power amplifier

Disclosed are systems and methods related to reducing intermodulation products in an RF output signal by matching an impedance of the power amplifier to an impedance of the antenna and concurrently blocking signals having a second fundamental frequency received by the antenna when the antenna is transmitting to inhibit intermodulation products of the first and second fundamental frequencies from re-radiating from the antenna. The matching and blocking are performed concurrently by a single circuit with combined matching and blocking functionality.

Combined output matching network and filter for power amplifier with concurrent functionality

Disclosed are systems, devices, and methodologies to reduce harmonics in a radio frequency output signal. A power amplifier system comprises a power amplifier and a tunable output matching network electrically connected between the output of the power amplifier and an output of the tunable output matching network. The tunable output matching network reduces second-order harmonics in an amplified radio frequency signal when the power amplifier operates in a low frequency mode. The tunable output matching network includes traps such as a series inductor and a first capacitor in series with a first switch, a second capacitor in series with a second switch, and a third capacitor in series with a third switch, where the traps are tuned to selected harmonic frequencies when the power amplifier operates in the low frequency band of the operating band of frequencies.

Broadband power amplifier systems and methods

Disclosed are systems and methods related to matching an impedance of the power amplifier to an impedance of the antenna in a power amplifier module that includes an amplifier circuit residing on a first semiconductor die and an output matching network (OMN) that includes a first partial OMN and a second partial OMN. The first partial OMN resides on the first semiconductor die and matches an output impedance of the amplifier circuit to an input impedance of the second partial OMN. The second partial OMN matches an output impedance of the first partial OMN with an input impedance of the antenna and is not part of the first semiconductor die.

Distributed output matching network for a radio frequency power amplifier module

According to one disclosed embodiment, a heavily doped subcollector is formed. Subsequently, a collector is fabricated over the heavily-doped subcollectoi, wherein the collector comprises a medium-doped collector layer adjacent to the subcollector and a low-doped collector layer over the medium-doped collector layer. Both the medium-doped collector layer and the low-doped collector layer can comprise gallium-arsenide doped with silicon at between approximately 5&times;10 cm and approximately 1&times;10 cm , and at between approximately 1&times;10 cm and approximately 3&times;10 cm , respectively. Thereafter, a base is grown over the collector, and an emitter is deposited over the base. The collector of the HBT prevents the depletion region from reaching the subcollector without unduly impeding the expansion of the depletion region. As a result, filamentation in the subcollector is prevented, but the HBT's performance remains optimal.

Method for fabrication of a heterojunction bipolar transistor

A dynamic bias controller dynamically biases a plurality of amplifiers residing in a power amplifier. Based upon a communication signal amplitude, the dynamic bias controller turns off (removes bias from) selected amplifiers when the communication device is to transmit a low power communication signal, and turns on (applies bias to) selected amplifiers when the communication device is to transmit a higher power communication signal. A plurality of dynamic bias controllers may control a plurality of amplifiers such that a plurality of communication signal strengths can be realized. Another embodiment employs a dynamic bias controller to control at least one prematching impedance network coupled to the selected amplifier, thereby adjusting the system impedance to a desired value.

Dynamic bias for a power amplifier

According to one disclosed embodiment, a heavily doped subcollector is formed. Subsequently, a collector is fabricated over the heavily-doped subcollector, wherein the collector comprises a medium-doped collector layer adjacent to the subcollector and a low-doped collector layer over the medium-doped collector layer. Both the medium-doped collector layer and the low-doped collector layer can comprise gallium-arsenide doped with silicon at between approximately 5&times;10 cm and approximately 1&times;10 cm , and at between approximately 1&times;10 cm and approximately 3&times;10 cm , respectively. Thereafter, a base is grown over the collector, and an emitter is deposited over the base. The collector of the HBT prevents the depletion region from reaching the subcollector without unduly impeding the expansion of the depletion region. As a result, filamentation in the subcollector is prevented, but the HBT's performance remains optimal.

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Bishops Stortford, United Kingdom

Apostolos Samelis