Cypress Semiconductor Corporation

Nayna Networks, Inc.

Anup Nayak

Derwin W Mattos

Arun Khamesra

Hemant P Vispute

Navaz M Lulla

Ramin Ighani

Nicholas Alexander Bodnaruk

Pavan Kumar Kuchipudi

Syed B Raza

Ramakrishna Venigalla

Godwin Gerald Arulappan

Karri Rajesh

Dimitris Pantelakis

S Babar Raza

Jeffery Scott Hunt

Andrew J Wright

Pradeep Kumar Bajpai

Partha Mondal

Hamid Khodabandehlou

Sanjay K Sancheti

Walter Francis Bridgewater, Jr

Sumeet Gupta

Murtuza Lilamwala

Brian P Evans

Myeongseok Lee

Ravi Konduru

James Daniel Merchant

Harish Dangat

Gordon Carskadon

Richard L Stanton

Shailja Garg

Mark A Ross

Dale Alan Gee

Xiao Yang

Sanjeev Kumar Maheshwari

Rajiv Nema

Bo Gao

Fariborz Golshani

Venkat Mandagulathur

Disclosed are techniques for saving power in a Universal Serial Bus (USB) repeater/re-timer between a USB host and a peripheral device by intercepting packets received from the host to predict the direction of data traffic to selectively turn off/on circuitry of a peripheral port used to receive packets from the peripheral device. If a host port determines that the host is sending a start-of-frame (SOF) packet, the direction of data flow is from the host to the peripheral device, and the repeater may turn off the peripheral port such as squelch circuitry. If the host port determines that the host is sending a non-SOF packet, such as an address token that precedes a host-to-peripheral-device data transfer or a peripheral-device-to-host data transfer, the direction of data flow is anticipated to be from the peripheral device to the host, and the repeater may re-enable the deactivated circuitry of the peripheral port.

Method and apparatus to save power in USB repeaters/re-timers

A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D&#x2212; terminals of a type-C receptacle. A D+/D&#x2212; multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D&#x2212; multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.

USB type-C signal interface circuit

A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a VCONN pin, a power rail coupled to internal circuits of the IC controller, and a VCONN switch coupled between the VCONN pin and the power rail. The VCONN switch comprises: a drain-extended n-type field effect transistor (DENFET) coupled between the VCONN pin and the power rail; a pump switch coupled to a gate of the DENFET; a resistor coupled between the VCONN pin and the gate of the DENFET; and a diode clamp coupled between the gate of the DENFET and ground.

Power supply architecture for USB-C controllers

A system includes a transformer having an auxiliary coil to provide a flyback voltage to a primary side of an alternating current to direct current (AC-DC) converter. A primary side controller includes an auxiliary pin coupled to the transformer and to an external capacitor, the auxiliary pin to receive the flyback voltage after startup. a junction gate field-effect transistor (JFET) coupled to a supply voltage. A first FET is coupled in series between the JFET and the auxiliary pin, the JFET to charge the external capacitor from the supply voltage during startup. One or more depletion region diodes are coupled to a gate of the first FET, the one or more depletion region diodes to bias a voltage of the gate of the first FET to a specific voltage.

Startup regulator using voltage buffer to stabilize power supply voltage

Techniques for control of power switches in a USB Power Delivery (USB-PD) system are described herein. In an example embodiment, an integrated circuit comprises a programmable gate control circuit coupled to a provider field effect transistor (FET) and a consumer FET to provide control signals to the provider and consumer FETs in response to system conditions and application requirements of the USB-PD system. A pulldown current control circuit may provide additional control to slew rate for the slow turn-ON of provider and consumer FETs.

Programmable gate driver control in USB power delivery

A USB-C controller, disposed on an integrated circuit (IC), comprises a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a Type-C receptacle. The USB-C controller further includes: a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals: and logic to control the multiplexer according to a mode enabled within a configuration channel (CC) signal.

USB type-C sideband signal interface circuit

A system includes a primary field effect transistor (FET) coupled to a primary winding on a primary side of an alternating current-to-direct current (AC-DC) converter. The system also includes a gate driver, coupled to the primary FET, that is to, in response to a signal received from a startup controller of the AC-DC converter, turn on the primary FET. The gate driver includes a voltage bias p-type metal-oxide-semiconductor (VBP) buffer coupled between an external supply voltage and a VBP portion of driving chain circuitry, the driving chain circuitry to drive a gate of the primary FET. The gate driver also includes a voltage bias n-type metal-oxide-semiconductor (VBN) buffer coupled between a VBN regulator, which generates an internal supply voltage, and a VBN portion of the driving chain circuitry.

Self-biased gate driver architecture

In an example embodiment, a Universal Serial Bus Type-C (USB-C) cable comprises a respective integrated circuit (IC) controller, disposed at each end of cable, that is coupled to a respective VCONN line at that end of the cable. Each IC controller comprises a power rail, a VDDD terminal, a VBUS terminal, and a VCONN terminal that is coupled to the VCONN line at the respective end of the cable. The VDDD terminal, the VCONN terminal, and the VBUS terminal are coupled to the power rail. The power rail is coupled to internal circuits of the IC controller and is configured to provide operating power to the internal circuits of the IC controller from the its VCONN terminal.

USB type-c signal interface circuit

Techniques for power-Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a method for an USB-enabled system with an integrated circuit (IC) controller comprises: determining, by the IC controller, whether a first power path or a second power path is coupled to the IC controller, where the first power path comprises an external N-channel power-FET and the second power path comprises an external P-channel power-FET; turning and maintaining ON the external N-channel power-FET by the IC controller, when the first power path is determined as being coupled to the IC controller; and turning OFF the external N-channel power-FET and turning and maintaining ON the external P-channel power-FET by the IC controller, when the second power path is determined as being coupled to the IC controller.

Configurable and power-optimized integrated gate-driver for USB power-delivery and type-C SoCs

A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.

USB power control analog subsystem architecture

Techniques for voltage discharge from a USB Power Delivery (USB-PD) VBUS line are described herein. In an example embodiment, an integrated circuit comprises a discharge control logic coupled to a first discharge circuit and to a second discharge circuit. The first discharge circuit configured to couple to a power source node on the VBUS line. The second discharge circuit configured to couple to an output node on the VBUS line. The discharge control logic is configured to independently control the first discharge circuit and the second discharge circuit to discharge the voltage on the VBUS line.

Programmable VBUS discharge in USB power delivery

A power supply architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller comprises a power rail, a VDDD terminal, a VCONN terminal, and a VBUS terminal. The VDDD terminal, the VCONN terminal, and the VBUS terminal are coupled to the power rail, where a VCONN switch is coupled between the VCONN terminal and the power rail, and a VBUS regulator is coupled between the VBUS terminal and the power rail. The power rail is coupled to internal circuits of the IC controller and is configured to provide operating power to the internal circuits from any one of the VCONN terminal and the VBUS terminal.

A device includes a USB-C controller instantiated as a first integrated circuit, the USB-C controller comprising a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a type-C receptacle. The controller further includes a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals. The controller further includes a series of cascaded, low-voltage n-type field-effect transistors (LVNFETs) coupled between the multiplexer and each terminal of the third pair of terminals.

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Fremont, CA, United States of America

Anup Nayak