Cypress Semiconductor Corporation

Anuj Chakrapani

Dinesh Maheshwari

Rajesh Manapat

An integrated circuit device may include a first integrated circuit (IC) portion having a memory array that stores data units as storage locations and burst access circuitry that sequentially accesses N relates storage locations within the memory array, where N&#x3e;1; and a second IC portion comprising a plurality of burst access registers coupled to the burst access circuitry, each burst access register having register locations to store at least N data units, and being coupled to a corresponding port by a single data unit access path.

Multi-port integrated circuit devices and methods

In one arrangement, a memory device () can include a number of banks (-to-) and corresponding counters (-to-). In response to a corresponding active access signal, each counter (-to-) can generate a bank available indication (BAto BA-) that may be initially inactive, and remain inactive during an initial count operation. Once a counter (-to-) reaches a predetermined limit, the corresponding bank available indication (BAto BA-) can be activated. A count limit can correspond to a minimum active-to-active timing parameter (T). An output circuitcan provide output data BA_DATA representative of bank available indications (BAto BA-).

Growing community of inventors

Bengaluru, India

Anuj Chakrapani