Nokia Corporation

Polar Electro Oy

Nokia Mobile Phones Limited

Nytell Software LLC

Antti Ruha

Tarmo Ruotsalainen

Jussi-Pekka Tervaluoto

Seppo Nissil&auml;

Jani Kauppinen

Hannu Sorvoja

Jari Miettinen

Joni Tuomas Jäntti

Mika Petri Sorvisto

Mika Niemim&auml;ki

Joni J&auml;ntti

Jussi Tervaluoto

Juha R&ouml;ning

Kauko V&auml;in&auml;m&ouml;

A multi-mode I/O circuit or cell () is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/O circuits. Each data link includes transmitter circuitry () and receiver circuitry (). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC. The I/O circuit is constructed with CMOS-based transistors (e.g., CMOS or BiCMOS) that are selectively interconnected together by a plurality of switches to operate as two single-ended, current or voltage mode links, or as a single differential current or voltage mode link. In the preferred embodiment the transmitter circuitry sends data to the receiver circuitry in another IC over a first pair of adjacently disposed conductors, and the receiver circuitry receives data from the transmitter circuitry in another IC over a second pair of adjacently disposed conductors. The transmitter circuitry and the receiver circuitry are selectively configured by the plurality of switches for operating in a double single-ended voltage mode link mode, a double single-ended current mode link mode, a mode defined by a single differential voltage mode link with a single-ended input drive, a mode defined by a single differential voltage mode link with a differential input drive, a mode defined by a single differential current mode link with a single-ended input drive mode, and a mode defined by a single differential current mode link with a differential input drive. A common I/O circuit may also be provided, and programmed into either the transmitter or the receiver circuit configuration.

Multi-mode I/O circuitry supporting low interference signaling schemes for high speed digital interfaces

The disclosed embodiments relate to a method for operating two or more mobile terminals in an interactive session. The mobile terminals are provided with one or more sensors. The data captured by the sensors is sent via a wireless connection to the other mobile terminals that participate in the interactive session. The data received from the other mobile communication terminals is communicated to the user of the respective mobile communication terminals via the user interface.

Sensor data sharing

The invention relates to a mixer circuitcomprising a down-conversion mixing componentarranged for down-converting an input radio frequency signal Irf+, Irf&#x2212;. In order to improve such a mixer circuit, it is proposed that it comprises in addition an active mixer load circuitconnected to output terminals of the mixing component. The active mixer load circuit includes an active mixer load, T, Tand modulating means S-Sarranged for modulating a flicker noise produced by the active mixer load away from the signal band of a signal Ibb+, Ibb&#x2212; output by the down-conversion mixing component. The invention relates equally to a receiver, a chip and a device comprising such a mixer circuit and to a method for use with such a mixer circuit.

Mixer circuit

A method of compensating a direct-current offset coupled into a receiving path of a receiver, the receiving path having at least one gain factor adjustable by a gain control, which method first determines an amount of a direct-current offset present at a selected end point in the receiving path. A compensation quantity is set accordingly. In case of a forthcoming adjustment of the at least one gain factor by the gain control, the compensation quantity is then scaled with a scaling factor to prevent a direct-current step at the selected end point due to this forthcoming adjustment. The final compensation quantity is fed at a selected summing node into the receiving path. The invention is also directed to a corresponding receiver, an electronic device comprising such a receiver, a hardware component for such a receiver and to a corresponding software program product.

Compensation of a DC offset in a receiver

The invention relates to method for operating two or more mobile terminals in an interactive session. The mobile terminals are provided with one or more sensors. The data captured by the sensors is send via a wireless connection to the other mobile terminals that participate in the interactive session. The data received from the other mobile communication terminals is communicated to the user of the respective mobile communication terminals via the user interface.

The invention relates to an active current mode sampling circuit comprising an operational amplifier () and at least one switched capacitor (C). In order to reduce the power consumption of such a circuit, first switching elements (S) switch the switched capacitor (C) between an input and an output of the operational amplifier () during charging phases &#x3c6;. Further, second switching elements (S) connect the switched capacitor (C) during discharging phases &#x3c6;to a subsequent stage (), in order to provide a charge of the switched capacitor (C) to the subsequent stage (). The invention relates equally to a device () comprising such a sampling circuit and to a method of operating such a sampling circuit.

Active current mode sampling circuit

Techniques for sample rate conversion are disclosed. In one exemplary embodiment, a sample rate conversion occurs between first samples having a sample rate defined by a first clock signal and second samples having a sample rate defined by a second clock signal. Using a conversion ratio and at a first rate defined by the first clock signal, a given second sample is determined from at least one first sample. A write pointer is updated for a buffer when second samples are written into the buffer. A read pointer is updated for the buffer when second samples are read from the buffer. The second samples are read from the buffer at a second rate defined by the second clock signal. The conversion ratio is modified based on the write and read pointers.

Techniques for sample rate conversion

An audio path is constructed to include a multi-bit sigma-delta converter for converting an N-bit digital input to an n-bit output representing an over-sampled, lower resolution n-bit version of the N-bit digital input; a formatter for converting the n-bit output to an m signal output (e.g., as a thermometer code, a SDM format or a PWM format); an m-by-m switching matric for receiving the m output signals and for reordering the m output signals, m class-D drivers individual ones of which are driven by one of the reordered m output signals for driving one of m speakers; and a dynamic element matching (DEM) block coupled to the switching matric for controlling the reordering of the m output signals driving the m class-D drivers for spreading the distortion due at least to driver-speaker pair mismatch to wide band noise. The DEM may operate to generate white noise, or it may generate shaped (colored) noise.

Method and apparatus for implementing a class D driver and speaker system

An electronic circuit for a switching power amplifier is shown where in order to reduce problems during the transition stage when switching an output stage of the amplifier, the circuit comprises an output stage formed by at least two switching stages . Each of the switching stages comprises at least two power switches and provides an output between the at least two power switches. Further, the switching stages are connected in parallel to each other. The proposed circuit comprises in addition clocking means for switching the power switches, wherein the clocking means switch the power switches of at least one of the switching stages in an overlapped mode and the power switches of at least one other of the switching stages in a non-overlapped mode. The invention relates equally to a corresponding method.

Electronic circuit for a switching power amplifier and method for switching the output stage of a switching power amplifier

Disclosed is a method for calibrating a delay-locked loop containing a chain of delay line elements that propagate a reference clock from delay line element to delay line element. Also disclosed is a delay-locked loop that operates in accordance with the method. The method includes, during a calibration procedure, sequentially varying the configuration of the chain of delay line elements so that there is one unused delay line element and a plurality of used delay line elements and, for each configuration, electrically compensating at least one delay line element based on a phase comparison results obtained from previous calibration configurations of the delay line elements so as to set the total delay through the chain of delay line elements at a desired value. The phase comparison is made between the reference clock and the propagated reference clock. Varying the configuration of the chain of delay line elements is accomplished in the preferred embodiment by changing the start and end of the chain of delay line elements

Self calibrating digital delay-locked loop

A multimode communications device includes an RF section and an analog-to-digital converter (ADC) located in a receive path between the RF section and a baseband section. The ADC includes a programmable signal converter core operable to perform ADC functions on a received RF signal in accordance with different types of mobile communication device operational modes, and further includes a multimode control function for programming the signal converter core as a function of a currently selected operational mode. The programmable signal converter core preferably includes a sigma-delta modulator, and a signal analysis function is provided for analyzing the received RF signal for dynamically programming the converter core to adapt to temporary signal and interference conditions by increasing or decreasing the performance of the signal converter. The signal analysis function may be embodied as a decimation filter having an input coupled to an output of the modulator, or by a digital signal processor forming a portion of a baseband section. The programmable signal converter core may be programmed to change the number of bits used by the sigma-delta modulator and/or a loop filter transfer function and loop filter coefficients, or a number of quantizer levels, or decimator coefficients and word width. The sigma-delta modulator bias currents may also be changed, as may a selected type of dynamic element matching function, each as a function of the selected mode. Other operational criteria that can be changed include the sigma-delta modulator oversampling ratio and/or a change from a switched capacitor to a resistor-capacitor circuit technique, or vice versa.

Adaptive sigma-delta data converter for mobile terminals

The invention relates to a method and an apparatus for identifying a heartbeat. In the method, an arterial pressure signal is measured in the form of multichannel measurement, and the required signal-processing operations, such as filtration, are carried out if necessary. The method also comprises carrying out signal detection and decision-making concerning the acceptance as a heartbeat signal. According to the invention, the signal detection includes multichannel channel-specific detection for the purpose of identifying signal components of different channels, and the obtained channel-specific detected channel signals are used as input data during the decision-making stage.

Method and apparatus for identifying heartbeat

A method and arrangement for blood pressure measurement are disclosed. In the method, a variable, compressive, acting pressure is applied to a compression, such as a person's extremity, by a pressure generator, and simultaneously, the effect of the variable acting pressure on the extremity is measured at a second point, the second point being farther from the heart than the compression point. The method determines diastolic and systolic pressure. The measured value of the variable acting pressure acting on the compression point is transferred to an interpreting unit, which also receives a pressure pulse generated by the heart. The pressure pulse is measured by a sensor at the second point for determining the effect of the variable acting pressure on the extremity. Further, diastolic pressure is determined int he interpreting unit based on the variable acting pressure, as the pressure when the interpreting unit detects a change in a trend of a characteristic of the pressure pulse indicative of magnitude.

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Oulu, Finland

Antti Ruha