Adesto Technologies Corporation

Antonio R Gallo

Yi Ma

Chakravarthy Gopalan

Foroozan Sarah Koushan

Janet Wang

Michael Allen Van Buskirk

John Ross Jameson

Programmable impedance elements structures, devices and methods are disclosed. Methods can include: forming a first electrode layer within an electrode opening that extends through a cap layer; planarizing to expose a top of the cap layer; cleaning the exposed top surface of the cap layer to remove residual species from previous process steps. Additional methods can include forming at least a base ion conductor layer having an active metal formed therein that may ion conduct within the ion conductor layer; and forming an inhibitor material that mitigates agglomeration of the active metal within the base ion conductor layer as compared to the active metal alone. Programmable impedance elements and/or devices can have switching material and electrodes parallel to both bottoms and sides of a cell opening formed in a cell dielectric. Other embodiments can include an ion conductor layer having an alloy of an active metal, or two ion conductor layers in contact with an active electrode.

Programmable impedance elements and devices that include such elements

A method of forming a conductive bridging memory cell can include forming an active electrode layer above a barrier layer formed on a lower conductive layer; forming at least one ion conductor layer over an active electrode layer; incorporating conductive ions into the ion conductor layer to create a switch memory layer that changes impedance in response to an electric field; and the active electrode layer is a source of conductive ions for the ion conductor, and the barrier layer substantially prevents a movement of conductive ions therethrough.

Fabrication methods of conducting bridge random access memory (CBRAM) device structures

A method can include forming at least one memory layer over a first electrode, the memory layer having at least one element formed therein that oxidizes in the presence of an electric field to form conductive paths within the memory layer; and forming an inhibiting layer within the memory layer that increases an oxidation energy for the at least one element, as compared to the oxidation energy for the at least one element in the memory layer without the inhibiting layer.

Memory elements and methods with improved data retention and/or endurance

A memory device can include a plurality of memory elements, each including first electrode having a surrounding first electrode side surface in a lateral direction; a memory material surrounding the first electrode side surface in the lateral direction, the memory material being programmable between at least two different impedance states in response to electric fields; and a second electrode formed around the memory material in the lateral direction.

Programmable impedance memory elements, methods of manufacture, and memory devices containing the same

A programmable impedance memory device structure can include a multi-layer variable impedance memory element formed on a planar surface of a first barrier layer, the multi-layer variable impedance memory element comprising a plurality of layers substantially parallel to the planar surface, including a memory material layer in contact with the planar surface, the first barrier layer being formed above a first insulating layer; and a second barrier layer formed over the memory element having a top surface substantially parallel with the planar surface. The first and second barrier layers can have lower mobility rates for at least one element within the memory material layer than the first insulating layer, and the memory material layer can be programmable by application of an electrical field between at least two different impedance states.

Variable impedance memory device structure and method of manufacture including programmable impedance memory cells and methods of forming the same

A memory device can include at least one cathode formed in first opening of a first insulating layer; at least one anode formed in a second opening of second insulating layer, the second insulating layer being a different vertical layer than the first insulating layer; and a memory layer comprising an ion conductor layer extending laterally between the at least one anode and cathode on the first insulating layer, the ion conductor layer having a thickness in the vertical direction less than a depth of the first opening.

Variable impedance memory element structures, methods of manufacture, and memory devices containing the same

A memory element can include a memory layer formed between two electrodes; at least one element within the memory layer that is oxidizable in the presence of an electric field applied across the electrodes; and an inhibitor material incorporated into at least a portion of the memory layer that decreases an oxidation rate of the at least one element within the memory layer with respect to the memory layer alone. Methods of forming such a memory element are also disclosed.

Conductive filament based memory elements and methods with improved data retention and/or endurance

A conductive bridging memory cell may include an ion conductor layer formed over an active electrode that is a source of conductive ions for the ion conductor; a conductive layer; and a barrier layer formed below the active layer and in contact with the conductive, the barrier layer substantially preventing a movement of conductive ions therethrough.

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San Mateo, CA, United States of America

Antonio R Gallo