Stmicroelectronics S.r.l.

Antonio Giambartino

Ignazio Martines

Michele La Placa

Salvatore Poli

Antonino La Malfa

Paolino Schillaci

Giorgio Pollaccia

Davide Appello

Slavatore Polizzi

An apparatus for the thermal testing of electronic devices may include a universal base board for coupling to an electronic driver unit for receiving electrical signals therefrom, and a plurality of test boards arranged on the base board. Each test board may include a holder for receiving a device under test and routing thereto electrical signals from the electronic driver unit as well as an adaptation board to the base board. Each test board may include a respective electrically powered heating element for heating the electronic device received thereat.

Apparatus for the thermal testing of electronic devices and corresponding method

A reading circuit for a semiconductor memory, comprising: a circuital branch adapted to be electrically coupled to a bit line which is connected to a memory cell to be read; an evaluation circuit adapted to sense a cell electric current flowing through the bit line during a sensing phase of a reading operation of the data stored into the memory cell, the evaluation circuit comprising a negative feedback control loop adapted to control the potential of the bit line during the sensing phase, the control loop comprising a differential amplifier having an inverting input terminal operatively connected to the bit line, a non-inverting input terminal fed by a first reference potential, and a feedback circuital path connected between an output of the differential amplifier and the inverting input, wherein the feedback circuital path is adapted to conduct a measure current corresponding to the cell electric current, and comprises current/voltage conversion means for converting the measure current into a corresponding voltage. The conversion means of the feedback circuital path comprises at least one first transistor arranged to conduct the measure current, and biasing means adapted to bias the at least one first transistor so as to emulate the behavior of a resistor.

Sense amplifier with reduced area occupation for semiconductor memories

A circuit architecture and a method perform a page programming in non-volatile memory electronic devices equipped with a memory cell matrix and an SPI serial communication interface, as well as circuit portions associated to the cell matrix and responsible for the addressing, decoding, reading, writing and erasing of the memory cell content. Advantageously, a buffer memory bank is provided to store and output data during the page programming in the pseudo-serial mode through the interface. Data latching is performed one bit at a time and the following outputting occurs instead with at least two bytes at a time.

Fast page programming architecture and method in a non-volatile memory device with an SPI interface

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Palermo, Italy

Antonio Giambartino