U.S. Philips Corporation

Anton P Van Arendonk

Geert J Davids

Leendert De Bruin

Josephus M Van Laarhoven

Alfred J Van Roosmalen

A method of enabling electrical connection to a substructure (10) forming part of an electronic device, such as an integrated circuit, is described in which an aluminum-containing electrically conductive level (1) is provided on a surface (12) of the substructure (10), an insulating layer (2) is deposited so as to cover the aluminum-containing electrically conductive level (1), a photosensitive resist layer (3) is provided on the insulating layer and a plasma etching step is then used to etch away insulating material so as to expose an electrically conductive surface to enable electrical connection to be made to the level (1). The insulating material (2) may be etched through a window in the resist layer (3) so as to form a via (14) or the resist layer (3) and insulating material (2) may be etched uniformly to provide a planarized surface. In the method, a layer (4) of another conductive material which is free of aluminum is provided on the level (1) prior to covering the level (1) with insulating material (2) so that the plasma etching step exposes an electrically conductive surface (4a) of the layer (4) of the said other conductive material which thus acts to mask the level (1) to prevent catalytic reaction between the aluminum and constituents in the plasma.

Method of enabling electrical connection to a substructure forming part

A semiconductor device is set forth comprising a number of parallel first electrodes (1) which are located on an insulating layer and are mutually separated by grooves with insulated walls, in which second electrodes (2) coplanar with the first electrodes (1) are provided. According to the invention, the first electrodes (1) are covered by an insulating layer provided with first contact windows (7), which each overlap at least one second electrode (2). The second electrodes (2) are provided with self-aligned second contact windows (8). Each second electrode (2) exhibits between its second contact window (8) and the first contact windows (7) overlapping the second electrode and also between said first contact windows (7), at least one interruption (9).

Method of manufacturing a charge-coupled device

Semiconductor device with contacts to parallel electrode strips

A method of manufacturing a semiconductor device, in which a double layer consisting of a layer of polycrystalline silicon and a top layer of a silicide is applied to a surface of a semiconductor substrate coated with a layer of silicon oxide. After an etching mask has been provided, the double layer is etched in a plasma formed in chlorine gas to which up to 20% by volume of tetrachloromethane is added until the layer of polycrystalline silicon is etched. Thus, the double layer is etched anisotropically and the layer of silicon oxide is attacked in practice to a very small extent.

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Eindhoven, Netherlands

Anton P Van Arendonk