Commissariat a L'energie Atomique Et Aux Energies Alternatives

Centre National De La Recherche Scientifique

Université Pierre Et Marie Curie (Paris 6)

L'université Pierre Et Marie Curie - (Paris 6)

Anton Korniienko

Eric Colinet

Patrick Villard

Michael Pelissier

Mykhailo Zarudniev

Dimitri Galayko

Gèrard Scorletti

Gèrard Billiot

Olesia Mokrenko

Eric Blanco

A design method for a phase-locked loop comprises: a controlled-frequency oscillator; a phase comparator, to determine a phase difference between an output signal of the controlled-frequency oscillator and a reference signal; a corrector to receive as input a signal representative of the phase difference and to generate at its output a first correction signal; at least one second corrector, to receive as input a signal representative of or affected by a phase noise of the reference signal or of the output signal of the controlled-frequency oscillator and to generate at its output a second correction signal; and a circuit for generating a slaving signal for the controlled-frequency oscillator on the basis of the first and second correction signals; the method using the H-infinity method. Method for fabricating such a loop comprising a design step implementing this method. Phase-locked loop thus obtained.

Phase-locked loop with multiple degrees of freedom and its design and fabrication method

A device for generating a clock signal, including a phase-locked loop including: a controlled oscillator to deliver a clock signal; plural phase comparators to compare a phase of the clock signal delivered by the controlled oscillator with plural clock signal phases applied at an input of the phase-locked loop; a mechanism for weighted summation of output signals of the plural phase comparators such that one or more of the weighting coefficients applied to one of the output signals has an absolute value that overrides the absolute values of the other weighting coefficients applied to the other output signals; and a mechanism filtering the weighted sum of the output signals of the plural phase comparators, to deliver at an output a control signal to the controlled oscillator.

Device for generating clock signals for asymmetric comparison of phase errors

A device for compensating a delay &#x3c4; suffered by a first periodic signal ref(t) during propagation between a first and second end of a first transmission connection, comprising at least:

Device and method for compensating a signal propagation delay

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Lyons, France

Anton Korniienko