Intel Corporation

Anton Ivanov

Gilbert A Neiger

Vedvyas Shanbhogue

Barry E Huntley

Scott Dion Rodgers

David M Durham

Ravi L Sahita

Robert S Chappell

Manohar Ruben Castelino

Mayank Bomb

Madhavan Parthasarathy

Uday R Savagaonkar

Carlos V Rozas

Francis X Mckeen

Vincent R Scarlata

Ittai Anati

Simon P Johnson

Michael A Goldsmith

Ilya Alexandrovich

Wesley Hamilton Smith

Rebekah M Leslie-Hurd

Rinat Rappoport

Alex Berenzon

William Colin Wood

Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and execution hardware. The instruction hardware is to receive a plurality of instructions, including an instruction to enter a virtual machine. The control logic is to determine, in response to a privileged event occurring within the virtual machine, whether to generate a virtualization exception. The execution hardware is to generate a virtualization exception in response to the control logic determining to generate a virtualization exception.

Virtualization exceptions

Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.

Instructions and logic to provide advanced paging capabilities for secure enclave page caches

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Beaverton, OR, United States of America

Anton Ivanov