Eshard

Antoine Wurcker

Hugues Thiebeauld De La Crouee

Christophe Clavier

A method for executing an operation by a circuit, may include using a first mask set of mask parameters including a same number of occurrences of all possible values of a word of an input data in relation to a size thereof, using an input set including for each mask parameter in the first mask set a data obtained by applying XOR operations to the input data and to the mask parameter and providing an output set including all data resulting from the application of the operation to a data in the input set. The output data may be obtained by applying XOR operations to any of the data in the output set and to a respective second mask parameter in a second mask set including a same number of occurrences of all possible values of the second mask parameters in relation to a size of thereof.

Method for protecting substitution operation against side-channel analysis

A method for executing by a circuit a substitution operation such that an output data may be selected in a substitution table using an input data as an index. The substitution operation may be performed using a new masked substitution table. The input data may be combined by XOR operations with a new value of a first mask parameter, and the output data may be combined by XOR operations with a new value of a second mask parameter. The new masked substitution table may be generated by computing the new value of the first mask parameter by applying XOR operations to a previous value of the first mask parameter and to a first input mask, computing the new value of the second mask parameter by applying XOR operations to a previous value of the second mask parameter and to a second input mask, and generating the new masked substitution table using a previous masked substitution table and the first and second input masks.

Methods for protecting substitution operation using substitution table against a side-channel analysis

In a general aspect, a method for executing a target operation combining a first input data with a second input data, and providing an output data can include generating at least two pairs of input words each comprising a first input word and a second input word and applying to each pair of input words a same derived operation providing an output word including a part of the output data resulting from the application of the target operation to first and second input data parts present in the pair of input words, and a binary one's complement of the output data part.

Method of protecting a circuit against a side-channel analysis

A method for executing, by a circuit, an operation combining first and second input data and providing an output data of the same size, may include generating from the first input data a first input set including all possible data in relation to a size of the first data, generating from the second input data a second input set including all possible data in relation to a size of the second data, and applying the operation to each pair of data including a data of the first input set and a data of the second input set, an output set of the operation including data resulting from the application of the operation to each of the pairs of data.

Protection method and device against a side-channel analysis

A method for executing by a circuit a bit permutation operation by which bits of an input data are mixed to obtain an output data including at least two words, may include: generating a mask set including mask parameters, the mask set having one word column per word of the input data; generating an input set by combining the input data with each mask parameter of the mask set by Exclusive OR (XOR) operations; and computing an output set including output data resulting from the application of the bit permutation operation to each data in the input set, where the mask set may be generated such that the output set includes columns of output words, and each word column of the mask set an the output set including a same number of occurrences of all possible values of one input data word and respectively one output word.

Methods and devices against a side-channel analysis

A method for executing an operation whereby a first input data, may be combined with a second input data, may include: defining data pairs whereby each data of a first input set is associated with a respective data of a second input set, the data in the first and second input sets may be obtained by applying Exclusive OR (XOR) operations to the first and second input data and to all first and second mask parameters of first and second mask sets; and computing output data by applying the operation to each of the data pairs, to obtain an output set, the first and second mask sets being such that a combination by XOR operations of each pairs of corresponding first and second mask parameters may produce a third mask set, where each mask sets may include a word column having a same number of occurrences of all possible values of the words.

Methods and devices against side-channel analysis

A test method can include: acquiring a plurality of value sets including measurements or signals corresponding with activity of a circuit when executing a set of cryptographic operations on secret data, for each value set, selecting at least two subsets of values, computing combined values and counting occurrence numbers of values transformed by a first surjective function applied to the combined values, for each operation and each possible value of a part of the secret data, computing a partial operation result, computing cumulative occurrence number sets by adding the occurrence number sets corresponding to the operations of the operation set, which when applied to a same value of the possible values of the part of the secret data, provide a partial operation result having a same transformed value by a second surjective function, and determine the part of the secret data from the cumulative occurrence number sets.

Method of testing the resistance of a circuit to a side channel analysis of second order or more

The present invention relates to a test method of a circuit, comprising: acquiring a plurality of value sets comprising values of a physical quantity linked to the activity of a circuit to be tested when the circuit executes an operation of a set of distinct cryptographic operations applied to a secret data, selecting at least a first subset in each value set, for each value set, counting by a processing unit occurrence numbers of values transformed by a first surjective function applied to the values of the first subset of the value set, to form an occurrence number set for the value set, for each operation of the operation set, and each of the possible values of a part of the secret data, computing a partial operation result, computing cumulative occurrence number sets by adding the occurrence number sets corresponding to the operations of the operation set, which when applied to a same value or equivalent value of the possible values of the part of the secret data, provide a partial operation result having a same transformed value resulting from the application of a second surjective function, merging according to a selected merging scheme, cumulative occurrence numbers in the cumulative occurrence number sets, and analyzing the merged cumulative occurrence number sets to determine the part of the secret data.

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Villenave d'Ornon, France

Antoine Wurcker