Lucent Technologies Inc.

Agere Systems Inc.

Agere Systems Guardian Corp.

Anthony S Oates

Sundar Srinivasan Chetlur

Pradip Kumar Roy

Sidhartha Sen

Jonathan Z-n Zhou

Yaw S Obeng

Merlyne M De Souza

Seung H Kang

Jia Sheng Huang

A semiconductor device having trap sites passivated with deuterium has enhanced immunity to hot carrier effects. The trap sites which are passivated with deuterium are encapsulated beneath a barrier film and are therefore resistant to having the deuterium diffuse away from the trap sites during subsequent high temperature processing operations.

Deuterium passivated semiconductor device having enhanced immunity to hot carrier effects

The present invention provides a method of forming an electromigration resisting layer in a semiconductor device. In an exemplary embodiment, the method comprises depositing a corrosion inhibitor comprising an organic ligand on a conductive layer of a semiconductor device wherein the conductive layer is susceptible to electromigration. The method further includes subjecting the corrosion inhibitor and the semiconductor device to a high temperature anneal to form an electromigration resisting layer on the conductive layer that reduces electromigration of the conductive layer.

Method of improving electromigration in semiconductor device manufacturing processes

The present invention provides a method for determining a hot carrier lifetime of a transistor. In one embodiment, the method comprises the steps of determining an initial transconductance (g,) of a transistor, and then, applying a stress voltage, which does not exceed a maximum breakdown voltage of the transistor, to the transistor to cause a transconductance degradation of the transistor, and then determining a subsequent transconductance (g,) of the transistor. A hot carrier lifetime of the transistor can then be determined as a function of g,and g,. Thus, the present invention provides a method in which the hot carrier lifetime is determined from sequential transconductance measurements without intervening, transistor characteristic tests that are typically conducted between the transconductance measurements that degrade the sensitivity of the g,measurement. The present invention provides a method that allows for an accurate determination of the hot carrier lifetime within a very short period of time, and therefore, can be used to monitor the hot carrier lifetime quality of the devices as they are fabricated without substantial increases in production downtime typically required to make hot carrier lifetime measurements.

Method for determining the hot carrier lifetime of a transistor

A process sequence for forming a semiconductor device utilizes a passivation annealing process using deuterium which enhances immunity to hot carrier effects and extends device lifetime. The process sequence is carried out prior to the introduction of metal conductive films to the device. The process sequence includes a three-step passivation, de-passivation, re-passivation sequence and utilizes a barrier film to encapsulate deuterium molecules in the vicinity of a gate oxide, during the de-passivation operation.

Process for deuterium passivation and hot carrier immunity

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Orlando, FL, United States of America

Anthony S Oates