U.S. Philips Corporation

Anthony R Cusdin

Paul A Moore

Alan F Dadds

Peter Mallinson

A cascaded amplifier is comprised of a number of amplifying stages connected in cascade such as the dual emitter-coupled amplifier shown. A first pair of transistors (14,20) provides limiting amplification and a second pair of transistors (16,18) with degeneration (22,24) provide linear amplification. Each pair of transistors is driven by a current source (28,26) which supplies a current (IT, IT2) proportional to absolute temperature (PTAT). The small signal amplification is then substantially independent of temperature and the value of the limited output is proportional to absolute temperature. This latter effect is countered by including a translinear variable current gain amplifier (54,56,58,60) in the last dual-gain stage of the cascaded amplifier to modify the output voltage in a manner inversely proportional to absolute temperature. A transfer function may thus be provided which is substantially independent of temperature.

Cascaded amplifier having temperature compensation

A four quadrant multiplier circuit having a high dynamic range and capable of operating at low voltages includes a dual transconductance amplifier circuit (TAC) consisting of NPN transistors (20 to 23 and 64 to 67), coupled to a first input port (36), first and second folded Darlington circuits (57,58), and a resistive element (78). Each Darlington circuit includes first and second NPN transistors (68,70 and 69,71) whose emitter-collector paths are connected in series and a third PNP transistor (72,73) having its emitter-collector path connected between the collector of the first transistor (68,69) and the base electrode of the second transistor (70,71). The emitter-collector junction (76,77) of the first and second transistors (68,70 and 69,71) is connected to the base electrode of the third transistor (72,73). The resistive element (78) is connected between the base electrodes of the third transistors (72,73). A second input port (56) is connected to the base electrodes of the first transistors (68,69). The emitter currents of the dual transconductance amplifier are supplied by way of current mirror circuits (80,81) from the emitter currents of the second transistors (70,71). The transconductance amplifier circuit (TAC) may be of any suitable type which has its transconductance linearly proportional to its emitter currents. In a refinement of the circuit, the current-to-voltage converter function of the current mirrors is carried out by the second transistors (70,71) and the transistors (82,83) of the current mirror circuits (80,81) are omitted.

Four quadrant multiplier circuit and a receiver including such a circuit

A transconductance amplifier comprises first and second input transistors having base electrodes to which an input voltage (Vi) is applied. A constant current source is connected to the emitters of the input transistors. Outputs are derived from their collector electrodes. A tapped impedance having two or more segments (R0 to RN,RN to R0) is connected between the base electrodes of the input transistors. The base electrodes of a plurality of further transistors are connected to respective taps of the tapped impedance. The emitter areas of these further transistors increase from each end of the tapped impedance towards the center of the tapped impedance. The emitters of the further transistors are connected to the current source and the collectors are connected to a junction which is connected to means for computing the combined base currents of the further transistors from the combined collector currents at said junction. The computed current is supplied by a current mirror circuit to the center of the tapped impedance to pull up the voltage at the center. The tapped impedance can have an increased resistance without unduly loading a preceding stage.

Transconductance amplifier

A zero IF receiver which is capable of detecting short duration or CW signals and of operating over a large dynamic range includes an input terminal for receiving an input signal, a quadrature down-converter coupled to the input terminal for producing quadrature related, frequency down-converted signals in a pair of signal paths. These signal paths each include an amplifier having a substantially sinh.sup.-1 transfer characteristic so that the pair of signal paths produce substantially logarithmic quadrature related output signals which are coupled to a demodulator. The demodulator converts the quadrature related output signals into amplitude and frequency descriptions of the input signal relative to a center frequency of the receiver. The amplitude description is determined by selecting the one of the quadrature related output signals having the larger absolute value and applying an amplitude correction thereto. The frequency description is determined by forming an indication of the phase angle of the input signal from the difference between the quadrature related output signals, applying a phase correction thereto, and determining the rate of change of the corrected phase angle indication.

Zero IF receiver employing, in quadrature related signal paths,

A method and a system for radio direction-finding by measuring the Time of Arrival (ToA) of the leading edge of signals from a distant source at two relatively closely spaced receiving elements. In order to give a good degree of immunity to multipath, the times at which the instantaneous detected amplitudes of the received signals first exceed a minimal threshold value such that received signals can be satisfactorily distinguished from noise is measured in such a manner that the measured time is not affected by multipath which involves more than a few meters additional path length for the indirect, delayed signal. A suitable timing circuit is disclosed. By making ToA measurements on three coplanar, non-collinear receivers, directions of incidence in three dimensions can be determined.

Radio direction-finding using time of arrival measurements

A radio direction-finding system comprises at least two adjacent, coplanar rectilinear antenna arrays (ARR.sub.1, ARR.sub.2) which face in different directions; phase measurements are performed on pairs of antennae of different spacings (ANT.sub.C /ANT.sub.1 -ANT.sub.N) in each array in order to derive the direction of incidence in the plane of the arrays and/or the direction of incidence with respect to said plane, e.g. bearing (.theta.) and elevation (.beta.) respectively. To reduce the number of channels required for resolving ambiguity in the phase measurement on the widest-spaced antenna pair (ANT.sub.C /ANT.sub.N) in each array, ambiguity is resolved as far as possible with more closely spaced pairs in each array and finally resolved on the two arrays jointly by amplitude comparison of signals received by the two arrays, even though the accuracy of the amplitude comparison may be insufficient to resolve ambiguity in the arrays separately. The invention is particularly applicable to a broadband system for radio sources which may be at substantial angles of elevation, e.g. up to 50 degrees.

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Horley, United Kingdom

Anthony R Cusdin