University of Arizona

Imec

Asm America, Inc.

Katholieke Universiteit Leuven, Ku Leuven R&d

Anthony Muscat

Eric James Shero

Mohith E Verghese

Ann Witvrouw

Chris Van Hoof

Lance R Hubbard

Jan Fransaer

Jean-Pierre Celis

Raquel Consuelo Hellin Rico

Shawn Miller

Methods for forming thin, pinhole-free conformal metal layers on both conducting and non-conducting surfaces, where the morphology and properties of the metal layers are tuned to meet desired parameters by adjusting the concentration of ionic liquids during the deposition process. The formed metal films contain tunable properties for solar and electronic use and provide specific advantages for non-conducting surfaces, which are otherwise unsuitable for electroplating without the presence of the formed metal films. The disclosed methods do not require the presence of a voltage or external electric field but form the metal films through an electroless technique using electrostatic interactions between negatively charged nanoparticles. In addition, the disclosed methods are compatible with solution phase processing and eliminate the need to transfer the surfaces into a vacuum chamber for a chemical or physical vapor deposition to form a metal layer.

Electrostatic coating of metal thin layers with adjustable film properties

Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.

Reactive site deactivation against vapor deposition

Manufacturing a semiconductor device involves forming () a sacrificial layer where a micro cavity is to be located, forming () a metal layer of thickness greater than 1 micron over the sacrificial layer, forming () a porous layer from the metal layer, the porous layer having pores of length greater than ten times their breadth, and having a breadth in the range 10 nm-500 nanometers. The pores can be created by anodising, electrodeposition or dealloying. Then the sacrificial layer can be removed () through the porous layer, to form the micro cavity, and pores can be sealed (). Encapsulating MEMS devices with a porous layer can reduce costs by avoiding using photolithography for shaping the access holes since the sacrificial layer is removed through the porous membrane.

Method for encapsulating a device in a microcavity

Growing community of inventors

Tucson, AZ, United States of America

Anthony Muscat