Texas Instruments Corporation

Other

Rockwell International Corporation

Anthony M Pavio

Mark Alan Smith

Kevin J Anderson

A multilayer planar transmission line (10) can be fabricated as a monolithic structure with series/shunt-connected components for integration in an MMIC device. The multilayer planar transmission line (10) includes a first transmission line structure (TL1) formed by a top conductor (14) and an interlevel conductor (16) separated by an interlevel dielectric (18). This structure is formed on one planar surface of a substrate (12), and a ground plane reference (20) is formed on the opposing surface, yielding second and third transmission line structures (TL2, TL3) formed by the groundplane reference and, respectively, the interlevel conductor (16) and the top conductor (14). The interlevel dielectric layer (18) is significantly thinner than the substrate dielectric, so that the first transmission line (TL1) is tightly coupled, and substantially unaffected by parasitics between the bottom of the interlevel conductor (16) and the groundplane reference (20). In an exemplary embodiment, a monolithic multilayer planar transmission line network is configured as a Marchand-type balun (30). A top conductor (34) is configured in two continuous sections (Z1 and Z2), and an interlevel conductor (36) is configured in two separate sections (ZS1) and ZS2), separated by a balance point gap (BP). This configuration forms series transmission lines (Z1 and Z2) shunt-connected to a second pair of series transmission lines (ZS1 and ZS2). With the appropriate configuration of the top and interlevel conductors (34, 36), impedance values can be established to yield a balanced signal output at the balance point gap (BP).

Monolithic multilayer planar transmission line

A coupler circuit (22) is provided including a substrate (24) having a base conductor (26) connected thereto. A conductive layer (28) is adjacent the substrate (24) and separated from conductors (32, 34) by a dielectric layer (30). The conductive layer (28) is operable to electromagnetically couple the first conductor (32) to the second conductor (34).

Coupler circuit

A GaAs monolithic true logarithmic amplifier which includes at least one amplifier stage common to the two arms of the circuit, the two arms being independent thereafter, one having lower gain and higher compression point and the other arm having higher gain and lower compression point. The signals in the arms are then recombined off-chip to provide the same effect as in the prior art. The circuit includes an input stage which amplifies and gain shapes the input signal and then splits the signal into upper and lower paths. The upper path is a relatively lower gain and higher compression point path whereas the lower path is a relatively higher gain and lower compression point path. The upper path includes a FET with a very large gate width whereas the lower path includes plural cascaded FETs, the last of which has a very small gate width. The upper and lower paths both have an odd or an even number of FETs to maintain the phase relation therebetween, the upper path further including transmission line stubs or elements which act as a delay line to compensate for the delay in the lower path due to the larger number of FETs therein. The outputs of the upper and lower paths are combined in a resistive combiner to provide the amplified signal. The output of this circuit is linear at low power and then demonstrates a knee therein at higher input power to resemble the curve of a logarithmic amplifier.

GaAs monolithic true logarithmic amplifier

A push-push broadband dielectric resonator oscillator circuit that operates in the K and Ka band frequency range has two oscillator circuits that oscillate at the same fundamental frequency. An antiphaseal relationship is maintained between the two oscillators through the use of a dielectric resonator and the desired frequency is obtained by vectorially combining the output signals of the two oscillators that have the antiphase relationship to obtain an output frequency that is twice the fundamental frequency of operation of each of the individual dielectric resonator oscillator circuits.

Push-push dielectric resonator oscillator

A distributed balance frequency multiplier has a transmission line that is configured using lumped elements having connection points for inputting signals. Connected to each connection point is the output from a non-inverting amplifier which does not invert a signal applied thereto. A second transmission line is configured also using lumped element techniques and has connection points for receiving an inverted amplified signal whose odd harmonics are 180.degree. to the non-inverting amplified signals. The signal that is to be amplified is carried to both the non-inverting and the inverting amplifier by a third transmission line that also uses lumped elements distribution techniques to create a transmission line. The output of the first transmission line and the second transmission lines are tied together so that the odd harmonics due to the inverting amplification stages cancel and the even harmonics are additive, thereby achieving an effective multiplication of the input signal.

Distributed balance frequency multiplier

A monolithic distributed mixer includes a plurality of dual gate field effect transistors (FETs) and first and second corresponding pluralities of T shaped constant K-filters connected respectively to first and second gates of the dual gate FETs for delaying in time the LO and RF voltages applied thereto whereby the phase shift is the same at each filter and the phase difference between the LO and RF at each FET is equal. Thus, the IF energy developed at each drain is in phase. The plurality of dual gate FETs have their drains commonly connected for summing the IF outputs thereof to provide a flat response throughout the bandwidth which is limited only by the cutoff voltages of the FETs or first and second pluralities of K-filters which act as low pass filters.

Monolithic distributed mixer

A single balanced self-oscillating dual gate FET mixer includes two dual-gate FETs, a dielectric resonator, two transmission lines inductively coupled to the resonator and connected to the second gates of the two dual-gate FETs, an RF input, two RF matching networks connected to the RF input and to the first gates of the two dual-gate FETs, a 180 degree power combiner, and two IF matching networks connected between the drains of the two dual-gate FETs and to the power combiner. The output of the power combiner is the IF output. The two dual-gate FETs comprise the active device of the oscillator and are used as a nonlinear mixing amplifier. The resonator network provides series feedback with gate 1 of each FET to produce the local oscillator signal and controls the frequency of oscillation. Single balancing of the local oscillator signals injected into gate 1 of each FET is accomplished by mutually coupling the resonator to the two transmission lines, thus providing the required 180 degree phase difference between signals. Finally, the 180 degree power combiner incorporates the phase change necessary for constructive addition of the IF signals originating from each drain port of each FET. With this structure the LO power is removed at the RF input to the mixer owing to the addition of leakage local oscillator signals that are 180 degrees out of phase.

Single balanced self-oscillating dual gate FET mixer

A -3 dB microwave quadrature coupler is provided on a single layer dielectric substrate and employs only two conductor coupling lines and a relatively wide, cost efficiently manufacturable coupling gap. The substrate is suspended within a mounting case providing a minimum spacing above and below the substrate. The ground plane is on the bottom of the substrate. Microstrip conductor ports are on the top of the substrate and are connected to a pair of parallel spaced coplanar conductor lines on top of the substrate juxtaposed a cut-out region of the ground plane therebelow. The coplanar conductor lines are balanced and coupled to each other, not to the ground plane nor to the mounting case. The coupler is compact, with a reduced length of .lambda./8. The coupler is amenable to implementation on inexpensive low dielectric constant substrate material, still with a relatively wide coupling gap.

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Plano, TX, United States of America

Anthony M Pavio