Intel Corporation

Anthony Luck

Qiuxu Zhuo

Hsing-Min Chen

Karthik Ananthanarayanan

In one embodiment, an apparatus comprises: a first circuit to compact a plurality of data blocks to a compacted data block and to compact a plurality of error correction codes (ECCs) associated with the plurality of data blocks to a compacted ECC; and a second circuit to generate a generated ECC for the compacted data block. The apparatus may directly send the plurality of data blocks to a destination circuit without error detection on the plurality of data blocks based at least in part on the compacted ECC and the generated ECC. Other embodiments are described and claimed.

System, method and apparatus for reducing power consumption of error correction coding using compacted data blocks

Apparatus, method, and system for efficiently identifying and tracking cold memory pages are disclosed. The apparatus in one embodiment includes one or more processor cores to access memory pages stored in the memory by issuing access requests to the memory and a page index bitmap to track accesses made by the one or more processor cores to the memory pages. The tracked accesses are usable to identify infrequently-accessed memory pages, where the infrequently-accessed memory pages are removed from the memory and stored in a secondary storage.

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San Jose, CA, United States of America

Anthony Luck