University of Notre Dame Du Lac

Indiana Integrated Circuits, LLC

Anthony Hoffman

Gary H Bernstein

Jason M Kulick

Scott Howard

Douglas C Hall

First, second, and third integrated devices each include one or more interconnecting structure. Each interconnecting structure includes (i) one or more interconnecting nodules extending from an edge surface of the device, (ii) one or more interconnect voids formed in an edge surface of the device, or (iii) both (i) and (ii). The one or more interconnecting structures on each of the first and second device is mated with the one or more interconnecting structures on the second device. The first integrated device includes a signal output, the third integrated device includes a signal input; and the second integrated device includes a conductor for conducting a signal from the signal output to the signal input.

Inter-chip alignment

First and second integrated devices each have an optical component and a plurality of interconnect structures disposed one edge thereon. The first edge surface of the second integrated device is positioned contiguous to the first edge surface of the first integrated device. The interconnect structures disposed on the first integrated device are in physical contact with the interconnect structures disposed on the edge surface of the second integrated device so as to provide alignment for conveying at least one signal between the optical components on the first and second integrated devices.

Quilt packaging system with mated metal interconnect nodules and voids

Quilt packaging system with interdigitated interconnecting nodules for inter-chip alignment

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South Bend, IN, United States of America

Anthony Hoffman