Ati Technologies Ulc

Advanced Micro Devices Corporation

Broadcom Corporation

Anthony Chan

Christopher Jude Brennan

Jimshed B Mirza

Chun Wang

Nooruddin Ahmed

Edward George Callway

Randy Wayne Ramsey

Nishank Pathak

Leon Lai

Ed Callway

Bernard T K Chan

Edwin Chi Yeung Pang

Angel Serah

Ricky Wai Yeung Iu

Ieon Lai

Systems, apparatuses, and methods for implementing a discard engine in a graphics pipeline are disclosed. A system includes a graphics pipeline with a geometry engine launching shaders that generate attribute data for vertices of each primitive of a set of primitives. The attribute data is consumed by pixel shaders, with each pixel shader generating a deallocation message when the pixel shader no longer needs the attribute data. A discard engine gathers deallocations from multiple pixel shaders and determines when the attribute data is no longer needed. Once a block of attributes has been consumed by all potential pixel shader consumers, the discard engine deallocates the given block of attributes. The discard engine sends a discard command to the caches so that the attribute data can be invalidated and not written back to memory.

Graphics discard engine

Systems, apparatuses, and methods for performing color channel correlation detection are disclosed. A compression engine performs a color channel transform on an original set of pixel data to generate a channel transformed set of pixel data. An analysis unit determines whether to compress the channel transformed set of pixel data or the original set of pixel data based on performing a comparison of the two sets of pixel data. In one scenario, the channel transformed set of pixel data is generated by calculating the difference between a first pixel component and a second pixel component for each pixel of the set of pixel data. The difference is then compared to the original first pixel component for each pixel. If the difference is less than or equal to the original for a threshold number of pixels, then the analysis unit decides to apply the color channel transform prior to compression.

Color channel correlation detection

Systems, apparatuses, and methods for converting pixel data to a custom swizzle mode are disclosed. A graphics engine receives data in a pre-defined swizzle mode. The graphics engine determines a custom swizzle mode for the data that has directionality aligned to the data itself to further optimize deltas that are used for compressing the data. The graphics engine groups incoming data into group of two neighboring pixels in both the horizontal and vertical directions. The graphics engine scores horizontal and vertical groupings against each other to make a first swizzle mode bit selection. Then the graphics engine increases the grouping of pixels to include additional pixels and scores the increased groupings against each other to make subsequent swizzle mode bit selections. The data is reswizzled into the custom swizzle mode and provided to a compressor to be compressed.

Swizzle mode detection

Systems, apparatuses, and methods for implementing automatic data format detection techniques are disclosed. A graphics engine receives data of indeterminate format and the graphics engine predicts an organization of the data. As part of the prediction, the graphics engine predicts the pixel depth (i.e., bytes per pixel (BPP)) and format separately. The graphics engine folds the data along pixel and channel boundaries to help in determining the pixel depth and format. The graphics engine scores modes against each other to generate different predictions for different formats. Then, the graphics engine generates scores for the predictions to determine which mode has a highest correlation with the input data. Next, the graphics engine chooses the format which attains the best score among the scores that were generated for the different modes. Then, the graphics engine compresses the unknown data using the chosen format with the best score.

Automatic data format detection

Systems, apparatuses, and methods for performing shader writes to compressed surfaces are disclosed. In one embodiment, a processor includes at least a memory and one or more shader units. In one embodiment, a shader unit of the processor is configured to receive a write request targeted to a compressed surface. The shader unit is configured to identify a first block of the compressed surface targeted by the write request. Responsive to determining the data of the write request targets less than the entirety of the first block, the first shader unit reads the first block from the cache and decompress the first block. Next, the first shader unit merges the data of the write request with the decompressed first block. Then, the shader unit compresses the merged data and writes the merged data to the cache.

Shader writes to compressed resources

Systems, apparatuses, and methods for compressing pixel data are disclosed. In one embodiment, if a block of pixel data is equal to a constant value, a processor compresses the block down to a metadata value which specifies the constant value for the entire block of pixel data. The processor also detects if the constant value is equal to a video specific typical minimum or maximum value. In another embodiment, the processor receives a plurality of M-bit pixel components which are most significant bit aligned in N-bit containers. Next, the processor shifts the M-bit pixel components down into least significant bit locations of the N-bit containers. Then, the processor converts the N-bit containers into M-bit containers. Next, the processor compresses the M-bit containers to create a compressed block of pixel data which is then stored in a memory subsystem.

Delta color compression application to video

Systems, apparatuses, and methods for selecting default page sizes in a variable page size translation lookaside buffer (TLB) are disclosed. In one embodiment, a system includes at least one processor, a memory subsystem, and a first TLB. The first TLB is configured to allocate a first entry for a first request responsive to detecting a miss for the first request in the first TLB. Prior to determining a page size targeted by the first request, the first TLB specifies, in the first entry, that the first request targets a page of a first page size. Responsive to determining that the first request actually targets a second page size, the first TLB reissues the first request with an indication that the first request targets the second page size. On the reissue, the first TLB allocates a second entry and specifies the second page size for the first request.

Selecting a default page size in a variable page size TLB

A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component cat be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.

Video decoder block

A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component can be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.

Growing community of inventors

Richmond Hill, Canada

Anthony Chan