Gem Services, Inc.

Siliconix Incorporated

Other

Anthony C Tsui

Ming Zhou

Anthony Chia

Hongbo Yang

Mohammad Eslamy

James Harnden

Y Mohammed Kasem

Liming Wong

Hui Teng

Richard Kent Williams

Jian Xu

Yueh-Se Ho

Mike F Chang

Sung-Shan Tai

Wayne Bryan Grabowski

Dorman C Pitzer

Lixiong Luo

Lynda Harnden, Legal Representative

Embodiments of the present invention relate to an improved package for a bi-directional and reverse blocking battery switch. According to one embodiment, two switches are oriented side-by-side, rather than end-to-end, in a die package. This configuration reduces the total switch resistance for a given die area, often reducing the resistance enough to avoid the use of backmetal in order to meet resistance specifications. Elimination of backmetal reduces the overall cost of the die package and removes the potential failure modes associated with the manufacture of backmetal. Embodiments of the present invention may also allow for more pin connections and an increased pin pitch. This results in redundant connections for higher current connections, thereby reducing electrical and thermal resistance and minimizing the costs of manufacture or implementation of the die package.

Bi-directional, reverse blocking battery switch

Embodiments in accordance with the present invention relate to flip-chip packages for semiconductor devices, which feature a die sandwiched between metal layers. One metal layer comprises portions of the lead frame configured to be in electrical and thermal communication with various pads on a first surface of the die (e.g. IC pads or MOSFET gate or source pads) through a solder ball contact. The other metal layer is configured to be in at least thermal communication with the opposite side of the die. Embodiments of packages in accordance with the present invention exhibit superior heat dissipation qualities, while avoiding the expense of wire bonding. Embodiments of the present invention are particularly suited for packaging of power devices.

Semiconductor package featuring flip-chip die sandwiched between metal layers

Embodiments in accordance with the present invention relate to techniques which avoid the problems of deformation in the shape of a solder connection in a flip chip package, resulting from solder reflow. In one embodiment, a solder-repellent surface is created adjacent to the solder to constrain the reflow and thereby maintain the vertical profile of the solder. Examples of such a solder-repellent surface include an oxide (such as Brown Oxide) of the lead frame, or a tape (such as Kapton) which is used as a dam bar to control/constrain the solder flow on the leads prior to the encapsulation step. In another embodiment, the solder connection may be formed from at least two components. The first component may reflow at high temperatures to provide the necessary adhesion between solder ball and the die, with the second component reflowing at a lower temperature to provide the necessary adhesion between the solder ball and the leads. An example of such multi-component connections include a first high temperature reflow solder ball paired with a second low temperature reflow solder. Another example includes a solder ball with a hard core (such as Cu, stainless steel, or a plastic material stable at high temperatures) coated with a lower temperature reflow material.

Interconnection of lead frame to die utilizing flip chip process

Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features.

Semiconductor device package having features formed by stamping

Embodiments of the present invention relate to an improved die layout for a bi-directional and reverse blocking battery switch. According to one embodiment, two switches are oriented side-by-side, rather than end-to-end, in a die package. This configuration reduces the total switch resistance for a given die area, often reducing the resistance enough to avoid the use of backmetal in order to meet resistance specifications. Elimination of backmetal reduces the overall cost of the die package and removes the potential failure modes associated with the manufacture of backmetal. Embodiments of the present invention may also allow for more pin connections and an increased pin pitch. This results in redundant connections for higher current connections, thereby reducing electrical and thermal resistance and minimizing the costs of manufacture or implementation of the die package.

The metal contact to the source and body regions in a vertical planar DMOSFET is formed by fabricating a sidewall spacer on the gate of the MOSFET. With the metal contact self-aligned to the gate in this way, the lateral dimension of each of the cells in the DMOSFET can be significantly reduced without the risk of a short between the contact and the gate, and the packing density of the cells can be increased. In this way, significant reductions in the on-resistance of the device can be achieved.

Method of forming vertical planar DMOSFET with self-aligned contact

An improved semiconductor device is disclosed. In one embodiment, the semiconductor device includes a semiconductor chip with contact areas on the top or bottom surface. A first lead assembly, formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to one of the contact areas of the semiconductor chip. The first lead assembly also has at least one lead connected to and extending from the lead assembly contact. A second lead assembly, also formed from a semi-rigid sheet of conductive material, has a lead assembly contact attached to another one of the contact areas of the semiconductor chip. The second lead assembly also has at least one lead connected to and extending from the lead assembly contact. An encapsulant encloses the semiconductor chip, the lead assembly contact of the first lead assembly and the lead assembly contact of the second lead assembly. The semiconductor device has low electrical and thermal resistance contributions from the package due to the direct connection of the lead assemblies to the chip. The semiconductor device may be formed as either a leaded package or a leadless chip carrier package.

IC chip package with directly connected leads

A multiple integrated circuit intra-package configuration having a centrally mounted integrated circuit die and an additional circuit device mounted in the package periphery. The additional circuit device may provide multiple functions, for example, to protect and enhance the performance of the integrated circuit die. Examples of such functions are electrostatic discharge protection circuits and temperature sensing. The intra-package circuit device avoids problems such as simple and complex process compatibility and additional space requirements of utilizing components external to the package. The multiple circuit intra-package configuration utilizes the small space available in the vicinity of lead posts in integrated circuit packages such as SOIC and TSSOP configurations to mount circuit devices. In one embodiment, a circuit device, for example, a diode, is mounted on a lead post and connected as desired using any of a variety of connectability alternatives such as wire bonding. In another embodiment, the integrated circuit die is attached conventionally to a die pad having a die pad extension disposed between lead posts. A circuit device is mounted on the die pad extension and connected as desired. Additionally, within the same package multiple circuit devices may be present and a large number of interconnectability options and versatile configurations are available.

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Saratoga, CA, United States of America

Anthony C Tsui